hys64t512020eu-3s-a Qimonda, hys64t512020eu-3s-a Datasheet - Page 32

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hys64t512020eu-3s-a

Manufacturer Part Number
hys64t512020eu-3s-a
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
Rev. 1.0, 2008-06
06112008-YHWK-B105
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Description
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
Not used
Interface Voltage Level
t
t
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t
t
t
t
t
t
t
CK
AC
CK
AC
CK
AC
RP.MIN
RRD.MIN
RCD.MIN
@ CL
SDRAM @ CL
@ CL
SDRAM @ CL
@ CL
SDRAM @ CL
[ns]
[ns]
[ns]
MAX
MAX
MAX
(Byte 18) [ns]
-1 (Byte 18) [ns]
-2 (Byte 18) [ns]
MAX
MAX
MAX
(Byte 18) [ns]
-1 [ns]
-2 [ns]
32
4 GByte
×64
2 Ranks (×8)
PC2–5300U–555
Rev. 1.2
HEX
80
08
08
0F
0A
61
40
00
05
30
45
00
82
08
00
00
0C
08
38
01
02
00
07
3D
50
50
60
3C
1E
3C
HYS64T512020EU–3S–A
HYS[64/72]T512020EU–[25F/2.5/3S]–A
Unbuffered DDR2 SDRAM Modules
HYS[64/72]T512020EU-3S-A
HYS72T512020EU–3S–A
4 GByte
×72
2 Ranks (×8)
PC2–5300E–555
Rev. 1.2
HEX
80
08
08
0F
0A
61
48
00
05
30
45
02
82
08
08
00
0C
08
38
01
02
00
07
3D
50
50
60
3C
1E
3C
Internet Data Sheet
TABLE 20

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