hys64d32301eu-6-d Qimonda, hys64d32301eu-6-d Datasheet - Page 11

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hys64d32301eu-6-d

Manufacturer Part Number
hys64d32301eu-6-d
Description
184-pin Unbuffered Double-data-rate Memory Modules
Manufacturer
Qimonda
Datasheet
Rev. 0.60, 2008-05
02142008-4Z51-SEDD
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
11
HYS[64/72]D[64/128]3x0EU–[5/6]–D
Unbuffered DDR SDRAM Modules
Abbreviations for Buffer Type
Abbreviations for Pin Type
Advance Internet Data Sheet
TABLE 5
TABLE 6

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