hys64d32301hu Qimonda, hys64d32301hu Datasheet - Page 12
hys64d32301hu
Manufacturer Part Number
hys64d32301hu
Description
184-pin Unbuffered Double Data Rate Sdram
Manufacturer
Qimonda
Datasheet
1.HYS64D32301HU.pdf
(39 pages)
- Current page: 12 of 39
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Rev. 1.21, 2006-09
03292006-RA8T-MSZL
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Serial Stub Terminated Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate,
and allows multiple devices to share as a wire-OR.
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
12
HYS[64/72]D[16/32/128]3xxHU–[5/6]–C
Unbuffered DDR SDRAM Modules
Abbreviations for Buffer Type
Abbreviations for Pin Type
Internet Data Sheet
TABLE 4
TABLE 5
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