hys64d64020gbdl-5-c Qimonda, hys64d64020gbdl-5-c Datasheet - Page 16
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hys64d64020gbdl-5-c
Manufacturer Part Number
hys64d64020gbdl-5-c
Description
200-pin Small Outline Dual -in-line Memory Modules
Manufacturer
Qimonda
Datasheet
1.HYS64D64020GBDL-5-C.pdf
(30 pages)
3.2
Rev. 1.21, 2007-01
03292006-F1IB-1I3E
Parameter
Operating Current 0
One bank; active/ precharge; DQ, DM, and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles.
Operating Current 1
One bank; active/read/precharge; Burst Length = 4; see component data sheet.
Precharge Power-Down Standby Current
All banks idle; power-down mode; CKE ≤
Precharge Floating Standby Current
CS ≥
Address and other control inputs changing once per clock cycle;
Precharge Quiet Standby Current
CS ≥
Address and other control inputs stable at ≥
Active Power-Down Standby Current
One bank active; power-down mode; CKE ≤
Active Standby Current
One bank active; CS ≥
DQ, DM and DQS inputs changing twice per clock cycle;
Address and control inputs changing once per clock cycle.
Operating Current Read
One bank active; Burst Length = 2; reads; continuous burst;
Address and control inputs changing once per clock cycle;
50% of data outputs changing on every clock edge;
CL = 2 for DDR266(A), CL = 3 for DDR333 and DDR400B;
Operating Current Write
One bank active; Burst Length = 2; writes; continuous burst;
Address and control inputs changing once per clock cycle;
50% of data outputs changing on every clock edge;
CL = 2 for DDR266(A), CL = 3 for DDR333 and DDR400B
Auto-Refresh Current
t
Self-Refresh Current
CKE ≤ 0.2 V; external clock on
Operating Current 7
Four bank interleaving with Burst Length = 4; see component data sheet.
RC
=
t
V
V
RFCMIN
IH,,MIN
IHMIN
, all banks idle; CKE ≥
, burst refresh
, all banks idle; CKE ≥
Current Specification and Conditions
V
IH,MIN
; CKE ≥
V
V
IH,MIN
IH,MIN
V
IH,MIN
;
;
V
V
IL,MAX
IN
V
;
V
=
t
IH,MIN
ILMAX
RC
V
REF
=
;
t
or ≤
RAS,MAX
V
for DQ, DQS and DM;
IN
V
=
IL,MAX
V
;
REF
I
OUT
16
.
for DQ, DQS and DM.
= 0 mA
V
IN
=
V
REF
for DQ, DQS and DM.
Small Outline DDR SDRAM Modules
HYS64D64020[H/G]BDL–[5/6]–C
Internet Data Sheet
I
TABLE 10
DD
Conditions
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
DD0
DD1
DD2P
DD2F
DD2Q
DD3P
DD3N
DD4R
DD4W
DD5
DD6
DD7