afbr-53d3 Avago Technologies, afbr-53d3 Datasheet - Page 9

• Manufacturer Part Number: afbr-53d3
• Description: Rohs Compliant 850 Nm Vcsel 1x9 Fiber Optic Transceivers For Fibre Channel
• Manufacturer: Avago Technologies

Table 1. Pinout Table
Figure 2. Pin-Out
9
NIC = NO INTERNAL CONNECTION (MOUNTING PINS)
Pin
1
2
3
5
6
7
8
9
4
Mounting Pins The mounting pins are provided for transceiver mechanical attachment to the circuit board. They are
1 = V
2 = RD+
3 = RD–
4 = SD
5 = V
6 = V
7 = TD–
8 = TD+
9 = V
RD+
RD-
Symbol
V
SD
V
V
TD-
TD+
V
EER
CCR
CCT
EET
EER
CCR
CCT
EET
TOP VIEW
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane. (For AFBR-53D3, V
Receiver Data Out
RD+ is an open-emitter output circuit. Terminate this high-speed differential PECL output with
Receiver Data Out Bar
RD- is an open-emitter output circuit. Terminate this high-speed differential PECL output with
Normal optical input levels to the receiver result in a logic "1" output, V
Detect input pr Loss of Signal-bar.
Receiver Power Supply
Provide +5 Vdc via the recommended receiver power supply filter circuit.
Locate the power supply filter circuit as close as possible to the V
Provide +5 Vdc via the recommended transmitter power supply filter circuit.
Locate the power supply filter circuit as close as possible to the V
Directly connect this pin to the transmitter signal ground plane.
Functional Description
embedded in the nonconductive plastic housing and are not connected to the transceiver internal
circuit, nor is there a guaranteed connection to the metallized housing in the EZ and FZ versions.
standard PECL techniques at the follow-on device input pin.
standard PECL techniques at the follow-on device input pin.
Signal Detect
optical levels to the receiver result in a fault condition indicated by a logic "0" output V
deasserted.
Signal Detect is a single-ended PECL output. SD can be terminated with standard PECL techniques
electrical power with small compromise to signal quality. If Signal Detect output is not used, leave it
open-circuited.
input pin.
input pin.
They should be soldered into plated-through holes on the printed circuit board.
via 50 Ω to V
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as, Signal
Transmitter Power Supply
Transmitter Data In-Bar
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
Transmitter Data In
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
Transmitter Signal Ground
NIC
NIC
RX
TX
CCR
- 2V. Alternatively, SD can be loaded with a 270Ω resistor to V
CCR
CCT
pin.
pin.
OH
, asserted. Low input
EER =
EER
V
EET
to conserve
)
OH
,