m366s3253etu-c7a Samsung Semiconductor, Inc., m366s3253etu-c7a Datasheet - Page 12

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m366s3253etu-c7a

Manufacturer Part Number
m366s3253etu-c7a
Description
Sdram Unbuffered Module
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
(Recommended operating condition unless otherwise noted, T
M366S1654ETS (16M x 64,128MB Module)
(Recommended operating condition unless otherwise noted, T
M366S3253ETS(U) (32M x 64, 256MB Module)
Notes : 1. Measured with outputs open.
DC CHARACTERISTICS
128MB, 256MB, 512MB Unbuffered DIMM
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
Parameter
Parameter
Symbol
Symbol
I
I
I
I
I
I
I
I
CC2
CC2
CC3
CC3
CC2
CC2
CC3
CC3
I
I
I
I
I
I
I
I
CC2
CC2
CC3
CC3
CC2
CC2
CC3
CC3
I
I
I
I
I
I
I
I
CC1
CC4
CC5
CC6
CC1
CC4
CC5
CC6
PS
NS
PS
NS
PS
NS
PS
NS
N
N
P
P
P
N
P
N
Burst length = 1
t
I
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
I
Page burst
4Banks activated
t
t
CKEd0.2V
Burst length = 1
t
I
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
CKE dV
CKE & CLK dV
CKE tV
Input signals are changed one time during 20ns
CKE tV
Input signals are stable
I
Page burst
4Banks activated
t
t
CKEd0.2V
RC
O
O
CCD
RC
RC
O
O
CCD
RC
= 0 mA
= 0 mA
= 0 mA
= 0 mA
tt
tt
tt
tt
= 2CLKs
= 2CLKs
RC
RC
RC
RC
(min)
IL
IH
IH
IL
IH
IH
(min)
(min)
IL
IH
IH
IL
IH
IH
(min)
(max), t
(max), t
(max), t
(max), t
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
(min), CS tV
(min), CLK dV
IL
IL
IL
IL
A
A
Test Condition
Test Condition
(max), t
(max), t
(max), t
(max), t
CC
CC
= 0 to 70qC)
CC
CC
= 0 to 70qC)
IH
/V
= 10ns
= 10ns
= 10ns
= 10ns
IL
IH
IH
IH
IH
=V
CC
CC
CC
CC
IL
IL
IL
IL
(min), t
(min), t
(min), t
(min), t
(max), t
(max), t
(max), t
(max), t
DDQ
=f
=f
=f
=f
/V
CC
CC
CC
CC
SSQ
CC
CC
CC
CC
= 10ns
= 10ns
= 10ns
= 10ns
=f
=f
=f
=f
)
Version
Version
1,440
640
160
200
200
800
360
100
100
520
720
7A
7A
16
16
80
50
50
24
80
40
25
25
12
8
8
Rev. 1.4 May 2004
Unit
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
SDRAM
Note
Note
1
1
2
1
1
2

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