lis302dltr8 STMicroelectronics, lis302dltr8 Datasheet - Page 27

• Manufacturer Part Number: lis302dltr8
• Description: Mems Motion Sensor 3-axis - ??2g/??8g Smart Digital Output ??piccolo?? Accelerometer
• Manufacturer: STMicroelectronics

LIS302DL
7.3
Zen bit enables the generation of Data Ready signal for Z-axis measurement channel when
set to 1. The default value is 1.
Yen bit enables the generation of Data Ready signal for Y-axis measurement channel when
set to 1. The default value is 1.
Xen bit enables the generation of Data Ready signal for X-axis measurement channel when
set to 1. The default value is 1.
CTRL_REG2 (21h)
Table 20.
Table 21.
SIM bit selects the SPI Serial Interface Mode. When SIM is ‘0’ (default value) the 4-wire
interface mode is selected. The data coming from the device are sent to SDO pad. In 3-wire
interface mode output data are sent to SDA_SDI pad.
BOOT bit is used to refresh the content of internal registers stored in the flash memory
block. At the device power up the content of the flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason the content of trimming registers was changed it is sufficient to use this bit
to restore correct values. When BOOT bit is set to ‘1’ the content of internal flash is copied
inside corresponding internal registers and it is used to calibrate the device. These values
are factory trimmed and they are different for every accelerometer. They permit a good
behavior of the device and normally they have not to be changed. At the end of the boot
process the BOOT bit is set again to ‘0’.
FDS bit enables (FDS=1) or bypass (FDS=0) the high pass filter in the signal chain of the
sensor
HP_coeff[2:1]. These bits are used to configure high-pass filter cut-off frequency ft.
SIM
BOOT
FDS
HP FF_WU2
HPFF_WU1
HP coeff2
HP coeff1
SIM
Register
Register description
BOOT
SPI Serial Interface Mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Filtered Data Selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter sent to output register)
High Pass filter enabled for FreeFall/WakeUp # 2. Default value: 0
(0: filter bypassed; 1: filter enabled)
High Pass filter enabled for Free-Fall/Wake-Up #1. Default value: 0
(0: filter bypassed; 1: filter enabled)
High pass filter cut-off frequency configuration. Default value: 00
(See table below)
--
FDS
HP_FF_W
U2
HP_FF_W
U1
Register description
HP_coeff2 HP_coeff1
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