w6694 Winbond Electronics Corp America, w6694 Datasheet - Page 31

no-image

w6694

Manufacturer Part Number
w6694
Description
Usb Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
Note: The PCM clocks are locked to the S/T receive clock. At every two or three PCM frame time (125 S), PBCK and PFCK1,
9.4.2 Serial EEPROM Timing
EPSK
EPCS
EPSDI
PARAMETER
PARAMETER
PFCK2 may be adjusted by one local oscillator cycle (130 nS) in order to synchronize with S/T clock. This shift is made
on the LOW level time of PBCK and the HIGH level time is not affected. This introduces jitters on the PBCK, PFCK1 and
PFCK2 with jitter amplitude 260 nS (peak-to-peak) and jitter frequency about 2.67~4 KHz.
ta1
ta2
ta3
ta4
ta5
ta6
ta7
ta8
tb1
tb2
tb3
tb4
tb5
tb6
tb7
tb4
tb3
PBCK pulse high
PBCK pulse low
Frame clock asserted from PBCK
PTXD data delay from PBCK
Frame clock deasserted from
PBCK
PTXD hold time from PBCK
PRXD setup time to PBCK
PRXD hold time from PBCK
EPSK low
EPSK high
EPCS output delay
EPSD output delay
EPSD tri-state delay
EPSD input setup time
EPSD input hold time
PARAMETER DESCRIPTIONS
PARAMETER DESCRIPTIONS
tb1 tb2
tb4
A5
A4
- 31 -
.....
MIN.
2500
2500
A1
30
30
MIN.
195
10
20
10
A0
tb5
Publication Release Date: October 2000
NOMINAL
MAX.
tb6
30
30
30
Preliminary W6694
325
325
D15
tb7
D14
Unit = nS
REMARKS
MAX.
455
20
20
20
.......
D1
Unit = nS
REMARKS
Revision A1
D0
tb3

Related parts for w6694