r8a66174sp Renesas Electronics Corporation., r8a66174sp Datasheet - Page 9

• Manufacturer Part Number: r8a66174sp
• Description: Parallel-in Serial-out Data Buffer With Fifo
• Manufacturer: Renesas Electronics Corporation.

OUTPUTS
OUTPUTS
INPUT
R8A66174SP
TIMING DIAGRAM
Instruction set 1~4
Timing diagram when RESET
INPUTS
WR recovery time other than data reading
REJ03F0278-0101 Rev.1.01 Oct.06.2008
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INPUTS
Φ
(Note 13)
C/D, CS
WR
D0~D7
SCLK
(Note 14)
SDATA
(Note 14)
OE, LATCH
(Note 15)
WR
INT
(Note 15)
RESET
WR
LATCH
OE
INT
trec(/INT-/W)
tsu(A-/W)
Note 13 : The timing diagram when division ratio is set (1/2, 1/4, 1/8, 1/16) is regarded as the waveform as divided by Φ.
There are specific Φ inputs for switching from each Φ state.
tw(/W)
tsu(D-/W)
tw(Φ)
tc(Φ)
tw(/R)
tPLH(/R-/OE)
tPHL(/R-LA)
tPLH(/R-/INT)
th(/W-D)
th(/W-A)
tPLH(/W-/OE), (/W-LA)
tPHL(/W-/OE), (/W-LA)
tPLH(/W-/INT)
tPLH(/W-SC)
trec(/R-/W)
trec(/W)
First byte
LSB
tPLH(Φ-SD)
tPHL(Φ-SD)
Note 14 : Output when command 3 is set.
Note 15 : Output when command 4 is set.
tPLH(Φ-SC)
Last byte
MSB
tPHL(Φ-/INT)