vp5225 Supertex, Inc., vp5225 Datasheet

vp5225

Manufacturer Part Number

vp5225

Description

P-channel Enhancement-mode Vertical Dmos Fet

Manufacturer

Supertex, Inc.

Datasheet

1.VP5225.pdf (3 pages)

Current page: 1 of 3
Download datasheet (661Kb)

Features

►

Applications

►

Absolute Maximum Ratings

Absolute Maximum Ratings are those values beyond which damage to

the device may occur. Functional operation under these conditions is

not implied. Continuous operation of the device at the absolute rating

level may affect device reliability. All voltages are referenced to device

ground.

* Distance of 1.6mm from case for 10 seconds.

Ordering Information

Parameter

Drain-to-source voltage

Drain-to-gate voltage

Gate-to-source voltage

Operating and storage temperature

Soldering temperature*

Low threshold (-2.4V max.)

High input impedance

Low input capacitance

Fast switching speeds

Low on-resistance

Free from secondary breakdown

Low input and output leakage

Medical Ultrasound imaging

Non-destructive evaluation

Solid state relays

Telecom switches

Logic level interfaces – ideal for TTL and CMOS

VP5225

Device

3-Lead TO-252 (D-PAK)

Package Option

VP5225K4

P-Channel Enhancement-Mode

Vertical DMOS FET

-55

C to +150

300

Value

±20V

DGS

DSS

-250

(V)

Pin Conﬁguration

Product Marking

/BV

General Description

This low threshold, enhancement-mode (normally-off)

transistor utilizes a vertical DMOS structure and Supertex’s

well-proven, silicon-gate manufacturing process. This

combination produces a device with the power handling

capabilities of bipolar transistors and the high input

impedance and positive temperature coefﬁcient inherent

in MOS devices. Characteristic of all MOS structures, this

device is free from thermal runaway and thermally-induced

secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a

wide range of switching and amplifying applications where

very low threshold voltage, high breakdown voltage, high

input impedance, low input capacitance, and fast switching

speeds are desired.

DGS

LLLLLLL

VP5225

YYWW

3-Lead TO-252 (D-PAK) (K4)

DRAIN

(max)

DS(ON)

3.0

(Ω)

YY = Year Sealed

WW = Week Sealed

L = Lot Number

GATE

SOURCE

VP5225

(min)

-2.5

D(ON)

(A)

Related parts for vp5225

vp5225 Summary of contents

Page 1

... BV /BV DSS DGS (V) -250 Pin Conﬁguration Value BV DSS BV DGS ±20V - +150 300 C O Product Marking R DS(ON) (max) (Ω) 3.0 DRAIN SOURCE GATE 3-Lead TO-252 (D-PAK) (K4) YYWW YY = Year Sealed VP5225 WW = Week Sealed L = Lot Number LLLLLLL 3-Lead TO-252 (D-PAK) (K4) VP5225 I D(ON) (min) (A) -2.5 ...

Page 2

... -10V -1. mmho V = -25V -200mA DS D 400 V = 0V, GS 150 -25V 1.0MHz -25V -500mA 25Ω GEN -500mA 0V -500mA GEN D.U.T. Output INPUT VP5225 I DRM (A) 3.0 ...

Page 3

... JEDEC Registration TO-252, Variation AA, Issue E, June 2004. Drawings not to scale. (The package drawing(s) in this data sheet may not reﬂect the most current speciﬁcations. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-VP5225 NR053008 ...

Related keywords

vp5225 datasheet
vp5225 data sheet
vp5225 pdf datasheet
vp5225 component
vp5225 part
vp5225 distributor
vp5225 RoHS
vp5225 datasheet download