kh561 Fairchild Semiconductor, kh561 Datasheet - Page 6

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kh561

Manufacturer Part Number
kh561
Description
Wideband, Low Distortion Driver Amplifier
Manufacturer
Fairchild Semiconductor
Datasheet
DATA SHEET
SUMMARY DESIGN EQUATIONS AND DEFINITIONS
KH561 Description of Operation
Looking at the circuit of Figure 1 (the topology and
resistor values used in setting the data sheet specifica-
tions), the KH561 appears to bear a strong external
resemblance to a classical op amp. As shown in the
simplified block diagram of Figure 2, however, it differs in
several key areas. Principally, the error signal is a
current into the inverting input (current feedback) and the
forward gain from this current to the output is relatively
low, but very well controlled, current gain. The KH561
has been intentionally designed to have a low internal
gain and a current mode output in order that an equivalent
output impedance can be achieved without the series
matching resistor more commonly required of low output
impedance op amps. Many of the benefits of a high loop
gain have, however, been retained through a very careful
control of the KH561’s internal characteristics.
The feedback and gain setting resistors determine both
the output impedance and the gain. R
sets the output impedance (R
determines the no load gain (A
R
equations shown below. Conversely, given an R
the performance equations show that both R
a part in setting R
adjustment would be possible if the inverting input imped-
ance (R
specification listing, independent gain and output imped-
ance setting is not directly possible.
6
Where:
R
R
C
f
f
g
x
and R
R
A
G – Internal current gain from inverting input
R
R
R
A
=
=
=
o
v
i
s
L
L
(
R
G 1 R
300 1
A
– Desired equivalent output impedance
– Non-inverting input to output voltage
– Internal inverting input impedance = 14Ω ±%5
– Non-inverting input termination resistor
– Load resistor
– Voltage gain from non-inverting input to
f
i
+
) were 0 but, with R
v
g
gain with no load
to output = 10 ±1%
load resistor
, given a desired R
R
)
R
1
o
o
o
R
1
2
g
A R
v i
o
0.08
and A
v
. Independent R
o
o
i
v
), while R
and A
R
from output to inverting
input
R
resistor from inverting
input to ground
C
compensation capacitor
from output to
pin 19 (in pF)
). solving for the required
= 14Ω as shown in the
f
g
x
– Feedback resistor
– External
– Gain setting
v
, yields the design
g
f
predominately
predominately
f
and R
o
f
and R
and A
g
play
g
v
,
R
R
R
A
Design Equations
Performance Equations
Simplified Circuit Description
Looking at the KH561’s simplified schematic in Figure 2,
the amplifier’s operation may be described. Going from
the non-inverting input at pin 8 to the inverting input at pin
18, transistors Q1 – Q4 act as an open loop unity gain
buffer forcing the inverting node voltage to follow the non-
inverting voltage input.
Transistors Q3 and Q4 also act as a low impedance (14Ω
looking into pin 18) path for the feedback error current.
This current, (i
very well defined current mirror having a gain of 10 from
this error current to the output. The current mirror outputs
act as the amplifier output.
The input stage bias currents are supply voltage inde-
pendent. Since these set the bias level for the whole
f
g
o
v
=
=
=
= +
6.8µF
(P
V
(
R
1
i
R
i
G 1 R
)
A
f
f
+
v
G 1
50Ω
+
R
R
R
+
R
R 1
g
)
+ +
f
s
1
40Ω
o
i
R
o
G 1
g
G
+
+V
R
err
R
+ +
.1µF
-V
18
A R
R
g
8
R
i
CC
), flows through those transistors into a
Figure 1: Test Circuit
CC
v i
g
f
R
R
+
KH561
(+15)
-
(-15)
R
4
21
R
i
f
.1µF
19
g
i
410Ω
R
10.5pF
5,10,15,
f
C
20
x
23
+
Where:
G ≡ forward current gain
R
R
A
6.8µF
v
i
o
R
≡ desired output
≡ inverting node input
≡ desired non-
o
(=10)
resistance (=14Ω)
impedance
inverting voltage
gain with no load
R
50Ω
L
REV. 1A February 2001
Resistor Values
shown result in:
R o = 50Ω
A v = +10
(no-load gain)
A
(gain to 50Ω load)
L
= +5 [14dB]
(P
V
o
o
)
KH561

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