cav24c02 ON Semiconductor, cav24c02 Datasheet - Page 2

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cav24c02

Manufacturer Part Number
cav24c02
Description
2-kb, 4-kb, 8-kb, And 16-kb I2c Cmos Serial Eeprom
Manufacturer
ON Semiconductor
Datasheet

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0
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. During input transitions, voltage undershoot on any pin should not exceed −1 V for more than 20 ns. Voltage overshoot on pins A
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
3. Page Mode, V
4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
5. When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively
Table 4. PIN IMPEDANCE CHARACTERISTICS
(V
Table 3. D.C. OPERATING CHARACTERISTICS
(V
Table 1. ABSOLUTE MAXIMUM RATINGS
Table 2. RELIABILITY CHARACTERISTICS
Storage Temperature
Voltage on any pin with respect to Ground (Note 1)
Symbol
CC
I
and WP should not exceed V
maximum ratings, irrespective of V
and JEDEC test methods.
I
and JEDEC test methods.
strong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V
CC
CCW
V
V
CCR
V
I
N
SB
OL
I
IH
I
IL
C
= 2.5 V to 5.5 V, T
L
WP
I
END
A
= 2.5 V to 5.5 V, T
Symbol
IN
Symbol
(Note 5)
(Note 4)
(Note 5)
T
(Note 3)
DR
Read Current
Write Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
CC
Parameter
= 5 V, 25°C.
A
A
SDA Pin Capacitance
Other Pins
WP Input Current
Address Input Current
(A0, A1, A2)
Product Rev H
= −40°C to +125°C, unless otherwise specified.)
Endurance
Data Retention
= −40°C to +125°C, unless otherwise specified.)
CC
Parameter
+ 1 V for more than 20 ns, while voltage on the I
CC
All I/O Pins at GND or V
V
Read, f
Write, f
Parameters
CC
.
A
Pin at GND or V
0
> 2.5 V, I
SCL and SDA
, A
Parameter
1
SCL
SCL
, A
2
= 400 kHz
= 400 kHz
and WP
OL
(Note 2)
= 3 mA
Test Conditions
CC
http://onsemi.com
CC
V
IN
= 0 V, f = 1.0 MHz, V
2
V
V
V
V
V
V
T
IN
IN
IN
IN
IN
IN
A
= −40°C to +125°C
< V
< V
< V
< V
< V
< V
Conditions
V
V
IH
IH
IH
IH
IH
IH
IN
IN
CC
, V
, V
, V
, V
, V
, V
> V
> V
), the strong pull−down reverts to a weak current source.
2
C bus pins, SCL and SDA, should not exceed the absolute
CC
CC
CC
CC
CC
CC
IH
IH
= 5.5 V
= 3.6 V
= 2.5 V
= 5.5 V
= 3.6 V
= 2.5 V
1,000,000
CC
Min
100
= 5.0 V
0.7 x V
0.7 x V
−0.5
Min
−65 to +150
−0.5 to +6.5
CC
CC
Ratings
Program / Erase Cycles
Max
130
120
0.3 x V
V
80
50
35
25
8
6
2
2
CC
Max
5.5
0.4
Units
Years
2
1
5
+ 0.5
2
CC
Units
Units
0
, A
Units
pF
pF
mA
mA
°C
mA
mA
V
mA
mA
V
V
V
V
1
, A
2

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