la6544m Sanyo Semiconductor Corporation, la6544m Datasheet - Page 7

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la6544m

Manufacturer Part Number
la6544m
Description
Four-channel Bridge Btl Driver For Cd-rom
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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Gain Setting (Functions of the Input and Gain Adjustment Pins)
The figures present overviews of the V
1. Consider resistors (11 k , typical) to be inserted between the V
2. If the VG pins are not used, and only the V
Offset Voltage
This IC includes built-in level shifting circuits. For input to which V
to the voltage V
channel 4.
same as the operational amplifier noninverting input (V
dB for channels 1, 2, and 3 (amplifier units: 1 dB + BTL: 6 dB) and 14 dB for channel 4 (amplifier units: 8 dB +
BTL: 6 dB).
If the V
those resistors will result in equivalent circuit operation. However, the V
minimize the I/O gain temperature characteristics.
This catalog provides information as of April, 2000. Specifications and information herein are subject to
change without notice.
IN
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
pins are not used and 11 k external resistors are attached to the VG pins, input to the opposite ends of
SS
1/2 (V) for channels 1, 2, and 3, and the output is referenced to the voltage (V
V IN 1 to V IN 3
IN
VG1 to VG3
and VG pin circuits. (These are the same as the block diagrams.)
V IN 4
VG4
IN
pins are used, the BTL gain (across the V
LA6544M
11 k
11 k
IN +
).
IN
+
+
12.5 k
27.5 k
REF
and VG pins. This should be seen as being the
is applied as a reference, the output is referenced
IN
pins should be used and the gain set to
A12687
O
+
and V
SS
2 – V
O -
outputs) will be 7
BE
(0.7))/2 (V) for
PS No. 6295-7/7

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