la6560 Sanyo Semiconductor Corporation, la6560 Datasheet - Page 2

• Manufacturer Part Number: la6560
• Description: Btl 4ch, H-bridge 1ch
• Manufacturer: Sanyo Semiconductor Corporation

Electrical Characteristics at Ta = 25°C, V CC 1 = V CC 2 = 8V, VREF = 2.5V, unless especially specified.
Note *1 : Current dissipation that is a sum of V CC 1 and V CC 2 at no load.
ALL Blocks
No-load current drain ON
No-load current drain OFF
Thermal shutdown temperature
VREF AMP
VREF-AMP offset voltage
VREF Input voltage range
VREF-OUT output current
BTL AMP Block (CH1 to CH4)
Output offset voltage
Input voltage range
Output voltage
Closed-circuit voltage gain
Slew rate
MUTE ON voltage
MUTE OFF voltage
Input AMP Block (CH1 to 4)
Input voltage range
Output current (SINK)
Output current (SOURCE)
Output offset voltage
CH1 input changeover voltage 1
CH1 input changeover voltage 2
Loading Block (CH5, H bridge)
Output voltage
Break output saturation voltage
Input low level
Input high level
Power Supply Block (PNP transistor : 2SB632K-use)
5V supply voltage
REG-IN SINK current
Line regulation
Load regulation
*2 : Input AMP is a BUFFER AMP.
*3 : Voltage difference between both ends of load (8Ω). Output saturated.
*4 : Output ON with MUTE : [H] and OFF with MUTE : [L] (HI impedance).
*5 : The source of input OP-AMP is a constant current. As the 11kΩ resistance to the next stage is a load, pay due attention when setting the input
*6 : With V IN 1-SW : [L], the input AMP selects AMP-A while VREF selects internal VREF (≈ 2.5V).
*7 : Short (GND) brake used. SINK side output ON.
*8 : 5VREG incorporates a drooping protection circuit and operated when the base current is 10mA (TYP).
With V IN 1-SW : [H], the input AMP selects AMP-B while VREF selects external VREF (≈ VREF-IN).
OP-AMP gain.
Parameter
VREF-OFFSET
REG-IN-SINK
SOURCE-OP
VMUTE-OFF
I-VREF-OUT
V CE -BREAK
VMUTE-ON
VSW-OP1
VSW-OP2
V OFF -OP
V O -LOAD
I CC -OFF
SINK-OP
VREF-IN
I CC -ON
V IN -OP
Symbol
ΔV O LN
ΔV O LD
V IN -H
V OUT
V OFF
V IN -L
TSD
V IN
V O
VG
SR
BTL-AMP output ON,
LOADING block OFF *1
All outputs OFF *1
Design guarantee value
CH1 input reference voltage
Voltage difference between outputs for BTL
AMP, each channel. *2
Input voltage range for input for OP-AMP.
Each voltage between V 0 + and V 0 - when
R L = 8Ω. *3
Input and output gain.
Input OP-AMP:BUFFER
AMP Independent
Multiply 2 between outputs.
*5
CH1 input AMP(B), external REF select *6
CH1 input AMP(A), internal VREF select *6
R L = 8Ω, VCONT=V CC *3
I O = 200mA
Base current of external PNP *8
6V ≤ V CC ≤ 12V, I O = 200mA
5mA ≤ I O ≤ 200mA
Output ON voltage, each MUTE *4
Output OFF voltage, each MUTE *4
At forward and reverse rotation,
Output voltage at braking *7
LA6560
Conditions
min
150
300
-10
-50
5.7
3.6
-10
5.7
4.8
1
2
0
2
0
2
2
2
5
Ratings
typ
175
500
6.2
0.5
6.5
5.0
30
10
10
10
10
5
4
V CC -1.5
V CC -1.5
V CC -1.5
max
200
100
100
6.6
4.4
0.5
0.5
0.3
5.2
50
15
10
50
10
No.A0599-2/9
1
Times
V/μs
Unit
mA
mA
mV
mA
mV
mA
mA
mV
mA
mV
mV
°C
μA
V
V
V
V
V
V
V
V
V
V
V
V