mt58l512v18p ETC-unknow, mt58l512v18p Datasheet - Page 23

• Manufacturer Part Number: mt58l512v18p
• Description: 512k 256k 32/36 Pipelined, Syncburst Sram
• Manufacturer: ETC-unknow

WRITE TIMING PARAMETERS
NOTE: 1. D(A2) refers to input for address A2. D(A2 + 1) refers to input for the next internal burst address following A2.
8Mb: 512K x 18, 256K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L512L18P_C.p65 – Rev. 2/02
SYMBOL
t
f
t
t
t
t
t
t
t
KC
KF
KH
KL
OEHZ
AS
ADSS
AAS
WS
BWa#-BWd#
ADDRESS
(NOTE 2)
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH.
3. OE# must be HIGH before the input data setup and held HIGH throughout the data hold time. This prevents
4. ADV# must be HIGH to permit a WRITE to the loaded address.
5. Full-width WRITE can be initiated by GW# LOW; or GW# HIGH and BWE#, BWa# and BWb# LOW for x18 device;
BWE#,
ADSP#
ADSC#
ADV#
GW#
OE#
CLK
CE#
When CE# is HIGH, CE2# is HIGH and CE2 is LOW.
input/output data contention for the time period prior to the byte write enable inputs being sampled.
or GW# HIGH and BWE#, BWa#-BWd# LOW for x32 and x36 devices.
D
Q
MIN
6.0
2.3
2.3
1.5
1.5
1.5
1.5
-6
BURST READ
MAX
166
3.5
High-Z
t ADSS
t CES
t AS
A1
MIN
7.5
2.5
2.5
1.5
1.5
1.5
1.5
t ADSH
t CEH
t AH
t KH
t OEHZ
(NOTE 3)
Byte write signals are
ignored for first cycle when
ADSP# initiates burst.
-7.5
t KC
t ADSS
t KL
Single WRITE
MAX
t DS
133
D(A1)
4.2
t ADSH
t DH
MIN
3.0
3.0
2.0
2.0
2.0
2.0
10
A2
-10
(NOTE 4)
MAX
100
4.5
D(A2)
WRITE TIMING
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
D(A2 + 1)
(NOTE 1)
t WS
BURST WRITE
23
t WH
PIPELINED, SCD SYNCBURST SRAM
(NOTE 5)
SYMBOL
t
t
t
t
t
t
t
t
D(A2 + 1)
DS
CES
AH
ADSH
AAH
WH
DH
CEH
8Mb: 512K x 18, 256K x 32/36
ADV# suspends burst.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D(A2 + 2)
MIN
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
ADSC# extends burst.
-6
D(A2 + 3)
MAX
t ADSS
MIN
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
A3
D(A3)
-7.5
t ADSH
DON’T CARE
MAX
Extended BURST WRITE
t WS
t AAS
D(A3 + 1)
t AAH
t WH
MIN
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
©2002, Micron Technology, Inc.
-10
UNDEFINED
D(A3 + 2)
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns