m62320gp Renesas Electronics Corporation., m62320gp Datasheet - Page 8

• Manufacturer Part Number: m62320gp
• Description: 8-bit I/o Expander For I2c Bus
• Manufacturer: Renesas Electronics Corporation.

M62320GP
• In case the I/O setting is different between each terminals.
• Write mode
• Read mode
REJ03D0909-0100 Rev.1.00 Mar 25, 2008
Page 8 of 10
D0 to D3
D4 to D7
(instance)
D4 to D7
output
D0
to
D3
D4
to
D7
SDA
SCL
An example: the parallel port terminals of D0 to D3 and D4 to D7 are assigned as output and input terminals,
respectively.
The terminal assigned as an output provides the data written in the output data latch.
After power-on, all terminals are reset to the input-state. Then an initial data low of the output latch are output after
the I/O setting has been done. Finally the assigned output are provided after the 8-bit data transmission.
The terminal assigned as an input keeps the input condition (high-impedance) regardless of 8-bit data setting.
The input data is taken into the input latch on every 8th negative-going edge of the SCL clock through the terminal
assigned as an input, and then the latched data is output via the SDA line.
The data of the output assigned terminal is also handled in the same procedures as above.
SDA
SCL
Start
condition
Start
condition
Hi-Z
Hi-Z
0
1
0
1
Hi-Z
1
2
1
2
Slave address
Slave address
1
3
1
3
1
4
1
4
A2
5
A2
5
A1 A0
6
A1 A0
6
7
D
7
1X
Data latch
0
8
1
8
A
A
P7
1
D17 D16 D15 D14 D13 D12 D11 D10
1
P6
2
2
P5 P4
3
I/O setting
3
4
DATA
4
P3
5
5
D
P2 P1
2X
6
6
7
7
Data latch
P0
8
8
A
A
D17 D16 D15 D14 D13 D12 D11 D10
D37 D36 D35 D34 D33 D32 D31 D30
D
3X
DATA
DATA
D
4X
Data latch
A
A
Data output
D27 D26 D25 D24 D23 D22 D21 D20
D47 D46 D45 D44 D43 D42 D41 D40
DATA
D
DATA
1X
A
Data output
A
D
2X
Stop
condition
Stop
condition