gvt73512a8 ETC-unknow, gvt73512a8 Datasheet - Page 5

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gvt73512a8

Manufacturer Part Number
gvt73512a8
Description
512k X 8 Sram
Manufacturer
ETC-unknow
Datasheet
NOTES
1.
2.
3.
4.
5.
6.
7.
July 7, 1998
Rev. 7/98
GALVANTECH
Input pulse levels
Input rise and fall times
Input timing reference levels
Output reference levels
Output load
AC TEST CONDITIONS
Undershoot:
All voltages referenced to VSS (GND).
Overshoot:
I
output loading and faster cycle times.
This parameter is sampled.
Test conditions as specified with the output loading as shown in
Fig. 1 unless otherwise noted.
Output loading is specified with C
is measured +500mV from steady state voltage.
At any given temperature and voltage condition,
than
cc
is given with no output current. I
t
LZCE and
t
HZWE is less than
V
V
IH
IL
-2.0V for t
+6.0V for t
L
=5pF as in Fig. 2. Transition
cc
t
t
LZWE.
RC /2
t
RC /2.
increases with greater
See Figures 1 and 2
, INC.
0V to 3.0V
t
HZCE is less
1.5ns
1.5V
1.5V
5
REVOLUTIONARY PINOUT 512K X 8
8.
9.
10. Address valid prior to, or coincident with, latest occurring chip
11.
12. Chip Enable and Write Enable can initiate and terminate a
13. Capacitance derating applies to capacitance different from the
14. Typical values are measured at 3.3V, 25
OUTPUT LOADS
WE# is HIGH for READ cycle.
Device is continuously selected. Chip enable and output enables
are held in their active state.
enable.
t
WRITE cycle.
load capacitance shown in Fig. 1.
RC
DQ
= Read Cycle Time.
Fig. 2 OUTPUT LOAD EQUIVALENT
Fig. 1 OUTPUT LOAD EQUIVALENT
DQ
Z
Galvantech, Inc. reserves the right to change products or specifications without notice.
0
= 50
351
Vt = 1.5V
50
GVT73512A8
o
C and 20ns cycle time.
3.3v
317
5 pF
30 pF

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