le9502 Zarlink Semiconductor, le9502 Datasheet - Page 12

• Manufacturer Part Number: le9502
• Description: Ringing Subscriber Line Interface Circuit
• Manufacturer: Zarlink Semiconductor

PIN DESCRIPTIONS
AGND
A
BGND
B
C1
C1
CFILT
CHS
DET
F
ILS
ISET
LPF
RDC
RTRIP
SD
VCC
VHP
VOUT
VINM
VINP
VRAMP
VREG
VRINGP, VRINGM
VSW
Exposed Pad
1,2
1,2
1,2
1
2
1,2
1,2
, C2
, C2
1,2
(TIP)
(RING)
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1
2
Pin Name
Isolated
Ground
Ground
Output
Output
Output
Output
Output
Output
Output
Supply
Output
Output
Supply
Supply
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Zarlink Semiconductor Inc.
12
Analog and digital ground return for VCC circuitry (common to both
channels).
A (TIP lead) power amplifier output for channels 1 and 2.
Battery ground return for power amplifiers on channel 1 and 2.
B (RING lead) power amplifier output for channels 1 and 2.
Logic control inputs to control channel 1 state.
Logic control inputs to control channel 2 state.
AC coupling pin for 4-wire amplifier
Compensation node for switching power supply channels 1 and 2.
Loop detector or ring trip detector output, depending on state of
control bits. If the SLIC device is in Ringing state then ring trip
indication is given, if the SLIC device is in Low Power Standby,
Normal Active or Reverse Polarity then hook switch indication is
given.
Fault detect pin for channels 1 and 2. A low indicates a fault for the
respective channel, which can be triggered by large longitudinal
current, ground key, or thermal overload.
Voltage sense pin to limit peak current in external switching power
supply transistor (channels 1 and 2).
Dual purpose pin: 1. sets the hook switch detection threshold (for
both channels); 2. sets the current source for triangle wave
generation for the switching power supply.
A capacitor tied to from this pin to AGND stabilizes the DC feed
loop, and lowers Idle Channel Noise.
Resistor connection to GND. Sets DC feed current limit, I
(common to both channels).
Network tied from RTRIP to VREG. Sets the ring trip threshold
detection level.
Base (gate) drive for switching power supply transistor (channels 1
and 2).
Positive supply for internal VCC circuitry (common to both
channels).
High pass invert summing node of the VOUT amplifier driven by the
AC current coming from CFILT
Analog (4-wire side) VOUT amplifier transmit output
Differential (P-M) analog (4-wire side) voice signal input.
Switching power supply ramp voltage that sets the frequency of the
switcher and the maximum duty cycle (common to both channels).
Negative power supply generated by SLIC device Switching
Regulator. (channels 1 and 2)
Differential ringing input (common to both channels).
Positive supply used by the SLIC device to generate the negative
regulated supplies of VREG
Exposed pad on underside of device must be connected to a heat
spreading area. The AGND plane is recommended.
Description
1
, VREG
1
and CFILT
2
(common to both channels).
2
.
LTH