cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 199
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cx28394
Manufacturer Part Number
cx28394
Description
Quad/x16/octal-t1/e1/j1 Framers
Manufacturer
Conexant Systems, Inc.
Datasheet
1.CX28394.pdf
(305 pages)
- Current page: 199 of 305
- Download datasheet (3Mb)
CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
TDL1_EN
RDL1_EN
MSG_FILL[1:0]
100054E
0A7—RDL #1 FIFO Fill Control (RDL1_FFC)
MSG_FILL[1]
7
MSG_FILL[0]
characters through the FIFOs, without generating or checking FCS bits. Non-FCS mode allows
the processor to generate and check the entire contents of each HDLC frame. Unformatted
data link modes provide transparent channel access in which every data link bit transmitted is
supplied by the processor through TDL1 and each bit received is passed to the processor
through RDL1 [addr 0A8]. Pack8 and Pack6 unformatted mode options select the number of
bits per byte that are stored in transmit/receive FIFOs, eight or six bits, respectively. The only
data processing performed during unformatted mode is the alignment of transmitted and
received data bits with respect to the transmit/receive multiframe.
Transmit Data Link 1 Enable—When enabled, transmitter begins to empty and to format the
contents of the transmit data link FIFO for output during the selected time slot bits according
to the selected DL1[1:0] mode. Also enables generation of transmitter data link interrupt
events.
Receive Data Link 1 Enable—When enabled, receiver begins to format data from the selected
time slot bits and to fill the receive data link FIFO according to the selected DL1[1:0] mode.
Also enables generation of receiver data link interrupt events.
Unformatted Message Fill Limit—Applicable only for Pack8 and Pack6 modes, the message
fill limit selects how many receive FIFO locations [RDL1; addr 0A8] are filled before the
receive data link generates an RFULL interrupt [ISR2; addr 009] and generates a
corresponding RDL1 Partial message status word entry. Fill limit thus determines how many
bytes constitute an unformatted message. Fill limits give the processor an alternative to using
RNEAR interrupts to signal the end of a received unformatted message. Note the number of
bits per unformatted message must divide evenly by the number of bits monitored per
multiframe.
00 = FCS
01 = No FCS
10 = Pack8
11 = Pack6
0 = disabled
1 = enable transmit data link
0 = disabled
1 = enable receive data link
6
Non-FCS mode passes all message bits that exist between the opening and closing FLAG
FFC[5]
5
FFC[4]
4
Conexant
FFC[3]
3
FFC[2]
2
FFC[1]
3.15 Data Link Registers
1
3.0 Registers
FFC[0]
0
3-77
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