cx28348 Mindspeed Technologies, cx28348 Datasheet - Page 103
cx28348
Manufacturer Part Number
cx28348
Description
Dual/triple/quad/hex/octal-enhanced Ds3/e3 Framer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28348.pdf
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CX28342/3/4/6/8 Data Sheet
2.2.8.1
2.2.8.2
28348-DSH-001-B
Writing into the FEAC Stack
A code word is shifted in to the stack for one of the following reasons:
!
!
!
Writing a new word into the FEAC stack causes shifting of old code words, possibly
overrunning the oldest code word.
Reading from the FEAC Stack
The messages are read from the FEAC stack in FIFO style. Reading FEAC stack can
be done by either polling or interrupt modes.
The sequence of operation in interrupt mode is as follows:
The sequence of operation in polling mode is as follows:
The FEAC stack logic cannot be disabled. Host systems using the interrupt mode to
read the FEAC messages should not enable the FEAC stack interrupts. The masking is
performed by setting the RxFEACSNEIE in Feature3 Control register. Systems using
the polling mode should not read the FEAC Stack register.
1.
2.
3.
1.
2.
If the code word is different from the previous code word.
If the stack was empty (either after reset or after channel enable).
When the FEAC channel comes out of Idle state (all-1s in the FEAC channel).
Wait for an interrupt, read the RxFEACSNE before the first read.
Read the FEAC stack message only if RxFEACSNE is on.
If the more bit in the read word is off, go to step 1 (wait for the next interrupt) or
else go to step 2.
Read the FEAC FIFO register. The word read is valid only if the valid bit is on.
If the more bit is on, the next word read is also valid.
Mindspeed Technologies™
Functional Description
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