k7a803600b Samsung Semiconductor, Inc., k7a803600b Datasheet - Page 11

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k7a803600b

Manufacturer Part Number
k7a803600b
Description
256kx36 & 512kx18-bit Synchronous Pipelined Burst Sram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K7A801800B
K7A803600B
Dout
AC TIMING CHARACTERISTICS
Notes : 1. The above parameters are also guaranteed at industrial temperature range.
Cycle Time
Clock Access Time
Output Enable to Data Valid
Clock High to Output Low-Z
Output Hold from Clock High
Output Enable Low to Output Low-Z
Output Enable High to Output High-Z
Clock High to Output High-Z
Clock High Pulse Width
Clock Low Pulse Width
Address Setup to Clock High
Address Status Setup to Clock High
Data Setup to Clock High
Write Setup to Clock High (GW, BW, WE
Address Advance Setup to Clock High
Chip Select Setup to Clock High
Address Hold from Clock High
Address Status Hold from Clock High
Data Hold from Clock High
Write Hold from Clock High (GW, BW, WE
Address Advance Hold from Clock High
Chip Select Hold from Clock High
ZZ High to Power Down
ZZ Low to Power Up
2. All address inputs must meet the specified setup and hold times for all rising clock edges whenever ADSC and/or ADSP is sampled low and CS
3. Both chip selects must be active whenever ADSC or ADSP is sampled low in order for the this device to remain enabled.
4. ADSC or ADSP must not be asserted for at least 2 Clock after leaving ZZ state.
is sampled low. All other synchronous inputs must meet the specified setup and hold times whenever this device is chip selected.
Output Load(A)
Zo=50Ω
PARAMETER
X
)
X
RL=50Ω
)
30pF*
(V
* Including Scope and Jig Capacitance
DD
=3.3V+0.165V/-0.165V, T
256Kx36 & 512Kx18 Synchronous SRAM
VL=1.5V for 3.3V I/O
V
DDQ
Fig. 1
- 11 -
/2 for 2.5V I/O
Symbol
t
t
t
t
t
HZOE
t
t
ADVH
t
t
t
t
LZOE
ADVS
t
t
t
t
t
t
t
t
t
t
CYC
HZC
t
t
t
CSS
CSH
PDS
PUS
LZC
WS
WH
CD
OE
OH
CH
AS
SS
DS
AH
SH
DH
CL
A
=0°C to +70°C)
353Ω / 1538Ω
Output Load(B),
(for t
MIN
6.0
1.5
1.5
2.3
2.3
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
Dout
0
0
2
2
-
-
-
LZC
-16
, t
MAX
LZOE
3.5
3.5
3.0
3.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
, t
Rev. 5.0 April 2006
HZOE
MIN
7.2
1.5
1.5
2.5
2.5
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
0
0
2
2
-
-
-
& t
HZC
-14
+3.3V for 3.3V I/O
/+2.5V for 2.5V I/O
319Ω / 1667Ω
5pF*
)
MAX
3.8
3.8
3.5
3.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UNIT
cycle
cycle
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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