w3e16m72s-xbx White Electronic Designs Corporation, w3e16m72s-xbx Datasheet - Page 7

• Manufacturer Part Number: w3e16m72s-xbx
• Description: 16mx72 Sdram
• Manufacturer: White Electronic Designs Corporation

February 2005
Rev. 7
OUTPUT DRIVE STRENGTH
The normal full drive strength for all outputs are specifi ed to
be SSTL2, Class II. The DDR SDRAM supports an option
for reduced drive. This option is intended for the support
of the lighter load and/or point-to-point environments. The
selection of the reduced drive strength will alter the DQs
and DQSs from SSTL2, Class II drive strength to a reduced
drive strength, which is approximately 54 percent of the
SSTL2, Class II drive strength.
DLL ENABLE/DISABLE
The DLL must be enabled for normal operation. DLL enable
is required during power-up initialization and upon returning
to normal operation after having disabled the DLL for the
purpose of debug or evaluation. (When the device exits self
refresh mode, the DLL is enabled automatically.) Any time
the DLL is enabled, 200 clock cycles must occur before a
READ command can be issued.
COMMANDS
The Truth Table provides a quick reference of available
commands. This is followed by a written description of
each command.
COMMAND
COMMAND
DQS
DQS
CLK
CLK
DQ
CLK
CLK
DQ
FIGURE 4 – CAS LATENCY
DATA
READ
READ
Burst Length = 4 in the cases shown
Shown with nominal tAC and nominal tDSDQ
White Electronic Designs
T0
T0
TRANSITIONING DATA
CL = 2
NOP
NOP
CL = 2.5
T1
T1
NOP
NOP
T2
T2
T2n
T2n
DON'T CARE
NOP
NOP
T3
T3
T3n
T3n
7
DESELECT
The DESELECT function (CS# HiGH) prevents new
commands from being executed by the DDR SDRAM.
The SDRAM is effectively deselected. Operations already
in progress are not affected.
NO OPERATION (NOP)
The NO OPERATION (NOP) command is used to perform
a NOP to the selected DDR SDRAM (CS# is LOW). This
prevents unwanted commands from being registered
during idle or wait states. Operations already in progress
are not affected.
LOAD MODE REGISTER
The Mode Registers are loaded via inputs A0-12. The
LOAD MODE REGISTER command can only be issued
when all banks are idle, and a subsequent executable
command cannot be issued until t
ACTIVE
The ACTIVE command is used to open (or activate) a row in
a particular bank for a subsequent access. The value on the
BA0, BA1 inputs selects the bank, and the address provided
0 1
1. E14 and E13 must be "0, 1" to select the Extended Mode Register (vs. the base Mode Register)
2. The QFE# function is not supported.
BA
E12
0
-
1
1 1
White Electronic Designs Corporation • [phone] • www.wedc.com
E11
BA
0
-
FIGURE 5 – EXTENDED MODE
0
E10
A
0
-
12
E9
0
-
A
REGISTER DEFINITION
11
E8
0
-
A
10
E7
0
-
Operating Mode
A
9
E6
0
-
A
8
E5
0
-
A
E4
7
0
-
W3E16M72S-XBX
A
E3
0
-
6
A
5
E2, E1, E0
A
4
Valid
MRD
-
A
QFC#
3
E2 2
0
-
A
DS
2
is met.
E1
0
1
A
1
DLL
E0
Operating Mode
A
0
1
QFC# Function
0
Reserved
Reserved
Reserved
Drive Strength
Disabled
Extended Mode
Register (Ex)
Reduced
Address Bus
Normal
Disable
Enable
DLL