lc895196k Sanyo Semiconductor Corporation, lc895196k Datasheet - Page 11

• Manufacturer Part Number: lc895196k
• Description: Ata-pi Compatible Cd-rom Decoder Ic
• Manufacturer: Sanyo Semiconductor Corporation

3. The Buffer RAM
4. Subcode Interface
5. The CD-DSP Data
6. Other Pins
D7 to D0 (input/output)
ZINT (output)
IO0 to IO15 (input/output)
RA0 to RA8 (output)
ZRAS0 (output)
ZCAS0 and ZCAS1 (output)
ZOE (output)
ZUWE, ZLWE (output)
EXCK, WFCK, SBSO, SCOR (input or output)
BCK, SDATA, LRCK, C2PO (input)
ZRESET (input)
XTALCK0, XTAL0
XTALCK1, XTAL1
MCK (output)
This is the MC-side data bus. Built-in pull-up resistor.
This is the interrupt signal to the microcontroller.
This is the buffer DRAM data bus. Built-in pull-up resistors.
These are the address pins for the buffer RAM.
These are the RAS output pins for the buffer DRAM.
This is the CAS output pin for the buffer DRAM. Normally ZCAS0 is used. When two 1M (64K
are used, connect the ZCAS0 output to the CAS pin of each DRAM. When the 2CAS types is used, connect ZCAS0
to UCAS and connect ZCAS1 to LCAS.
The read output signal for the buffer DRAM.
This is the write output signal for the buffer DRAM. This connects to various DRAM pins. When the 2CAS type is
used, connect ZLWE to the write enable signal.
These are the subcode interface pins. By connecting these to the CD-DSP the subcode data is accepted by the
LC895196K and transferred to the host.
When connected to CD-DSP, CD-ROM data is acquired. C2PO is a pin for use by the C2 flag.
This is the LC895196K reset pin. The LC895196K is reset when this signal is low. This signal must be kept low for
at least a period of 1 µs after power on.
These cause oscillation at 33.8688 MHz. Frequencies from the outside may also be input into XTALCK0.
Basically, these pins cannot oscillate. If these pins are not used, connect XTALCK1 (pin 100) to ground.
This outputs the XTALCK1 and XTALCK1/2 frequencies. The output can also be turned off.
LC895196K
16 bit) DRAMS
No. 5852-11/12