lc89978m Sanyo Semiconductor Corporation, lc89978m Datasheet - Page 3

• Manufacturer Part Number: lc89978m
• Description: Ccd Delay Line For Multi-system
• Manufacturer: Sanyo Semiconductor Corporation

Control Pin Functions
Switching Voltage Levels
Note: *Since the control pins have built-in pull-down resistors (about 70 k ), leaving these pins opens effectively sets them to the low level.
Function of the 4FSC Pin
This pin provides a 4fsc clock signal generated by the 4 PLL frequency multiplier circuit.
Electrical Characteristics at V
Switching voltage level: low
Switching voltage level: high
Supply current
[Chrominance signal characteristics] (with no input to Y-IN)
DC output voltage
Voltage gain
Comb depth
Linearity
Clock leakage (4fsc)
Clock leakage (fsc)
CONT1
High
High
Low
Low
CONT2
High
High
Low
Low
Parameter
Parameter
Mode (representative)
PAL/GBI
NTSC/M
PAL/M
—
DD
Chrominance signal delay (number of CCD stages)
= 5.0 V, Ta = 25°C, F
V
V
V
L
L
L
L
L
L
Symbol
Symbol
V
V
V
G
G
G
OUTC-1
OUTC-2
OUTC-3
L
L
L
CK4C-1
CK4C-2
CK4C-3
CK1C-1
CK1C-2
CK1C-3
I
I
I
C
C
C
DD-1
DD-2
DD-3
INC-1
INC-2
INC-3
NC-1
NC-2
NC-3
V
V
VC-1
VC-2
VC-3
D-1
D-2
D-3
H
L
2H (1833.5) + 0H (1.5)
2H (1821.5) + 0H (1.5)
1H (911.5) + 0H (1.5)
SW1
a
a
b
a
a
b
a
a
b
a
a
b
a
a
b
a
a
b
a
a
b
a
a
b
SW2
LC89978M
—
a
b
b
a
b
b
a
b
b
a
b
b
a
b
b
a
b
b
a
b
b
a
b
b
SW3
Switch states
CLK
Conditions
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
SW4
= 3.579545 MHz, V
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
Test conditions
*1
*1
*1
*2
*2
*2
*2
*2
*2
*3
*3
*3
*4
*4
*4
*5
*5
*5
*6
*6
*6
*6
*6
*6
Luminance signal delay (number of CCD stages)
CLK
min
min
–0.3
–0.3
2.0
1.9
1.4
31
–2
= 500 mVp-p
1H (913)
1H (907)
1H (907)
Ratings
Ratings
typ
typ
—
–40
0.0
5.0
2.4
1.9
0.0
0.5
36
10
0
Continued on next page.
max
max
+0.5
+0.3
–35
6.0
2.9
2.4
1.5
41
+2
50
No. 5546-3/7
mVrms
mVrms
Unit
Unit
mA
dB
dB
dB
V
V
V
V