lc89201 Sanyo Semiconductor Corporation, lc89201 Datasheet - Page 5

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lc89201

Manufacturer Part Number
lc89201
Description
9600-bps Facsimile Modem
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
2. DTE Interface Pins
3. Eye Pattern Interface Pins
4. V.24 (RS-232C) Interface Pins
5. Analog Signal Pins
Pin No.
Pin No.
Pin No.
Pin No.
29
28
27
26
25
23
22
21
20
19
18
17
16
30
32
33
34
15
67
68
66
65
57
59
58
61
60
62
39
44
43
40
41
42
47
46
45
49
48
EYESYNC
WRITEB
RESETB
EYECLK
READB
OPA2M
OPA2O
OPA1M
OPA1O
Symbol
Symbol
Symbol
RLSDB
Symbol
OPA2P
OPA1P
IREQB
AUXIN
PGCO
EYEX
EYEY
RTSB
CTSB
DCLK
PGCI
CSB
RXD
RXA
TXD
TXA
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
B
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Data bus to host CPU
Address bus to host CPU
Chip select signal
Interface memory read signal
Interface memory write signal
Interrupt request to host CPU
System reset signal
Timing clock for generating eye pattern data. This may be used as the shift clock for an external shift register.
Eye pattern synchronization signal
Eye pattern data serial outputs (8 bits, MSB first)
Request to send signal. The low level at this pin starts transmission; the high level suspends it.
Clear to send signal. The low level at this pin signals the availability of data for transmission; the high level indicates
that the data is invalid.
Received line signal data signal. The low level at this pin gives the timing for transferring the data received to the
terminal.
Transmit data input
Receive data output
Transmission data clock output
Transmitter analog output
Receiver analog input
Auxiliary analog input
Transmission buffer input/output pins. (For details, see circuit diagram.)
Reception buffer input/output pins (For details, see circuit diagram.)
Reception gain adjustment circuit input. (For details, seecircuit diagram.)
Reception gain adjustment circuit output.
LC89201
Function
Function
Function
Function
No. 4974-5/8

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