k4x51163pe Samsung Semiconductor, Inc., k4x51163pe Datasheet

k4x51163pe

Manufacturer Part Number

k4x51163pe

Description

32mx16 Mobile Ddr Sdram

Manufacturer

Samsung Semiconductor, Inc.

Datasheet

1.K4X51163PE.pdf (20 pages)

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K4X51163PE - L(F)E/G

32Mx16 Mobile DDR SDRAM

1. FEATURES

• VDD/VDDQ = 1.8V/1.8V

• Double-data-rate architecture; two data transfers per clock cycle

• Bidirectional data strobe(DQS)

• Four banks operation

• Differential clock inputs(CK and CK)

• MRS cycle with address key programs

• EMRS cycle with address key programs

• Internal Temperature Compensated Self Refresh

• All inputs except data & DM are sampled at the positive going edge of the system clock(CK).

• Data I/O transactions on both edges of data strobe, DM for masking.

• Edge aligned data output, center aligned data input.

• No DLL; CK to DQS is not synchronized.

• DM0 - DM3 for write masking only.

• Auto refresh duty cycle

2. Operating Frequency

NOTE:

1) CAS Latency

3. Address configuration

- DM is internally loaded to match DQ and DQS identically.

4. Ordering Information

- L(F)E : 60FBGA Pb(Pb Free), Normal Power, Extended Temperature(-25 °C ~ 85 °C)

- L(F)G : 60FBGA Pb(Pb Free), Low Power, Extended Temperature(-25 °C ~ 85 °C)

- C6/C3 : 166MHz(CL=3) / 133MHz(CL=3)

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTH-

ING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY

INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS"

BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could result in

loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.

- 7.8us for -25 to 85 °C

- CAS Latency ( 3 )

- Burst Length ( 2, 4, 8, 16 )

- Burst Type (Sequential & Interleave)

- Partial Array Self Refresh ( Full, 1/2, 1/4 Array )

- Output Driver Strength Control ( Full, 1/2, 1/4, 1/8 )

Speed @CL2

Speed @CL3

K4X51163PE-L(F)E/GC6

K4X51163PE-L(F)E/GC3

Organization

Part No.

32Mx16

166MHz(CL=3),83MHz(CL=2)

133MHz(CL=3),83MHz(CL=2)

DDR333

166Mhz

83Mhz

Bank Address

BA0,BA1

Max Freq.

- 4 -

Row Address

A0 - A12

Interface

LVCMOS

Mobile DDR SDRAM

DDR266

133Mhz

83Mhz

Column Address

A0 - A9

Pb (Pb Free)

Package

60FBGA

June 2007

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