k7d803671b Samsung Semiconductor, Inc., k7d803671b Datasheet - Page 15

• Manufacturer Part Number: k7d803671b
• Description: 8m Ddr Synchronous Sram
• Manufacturer: Samsung Semiconductor, Inc.

K7D803671B
K7D801871B
JTAG DC OPERATING CONDITIONS
NOTE : 1. The input level of SRAM pin is to follow the SRAM DC specification.
JTAG AC TEST CONDITIONS
NOTE : 1. See SRAM AC test output load on page 5.
JTAG AC Characteristics
JTAG TIMING DIAGRAM
Power Supply Voltage
Input High Level
Input Low Level
Output High Voltage(I
Output Low Voltage(I
Input High/Low Level
Input Rise/Fall Time
Input and Output Timing Reference Level
TCK Cycle Time
TCK High Pulse Width
TCK Low Pulse Width
TMS Input Setup Time
TMS Input Hold Time
TDI Input Setup Time
TDI Input Hold Time
Clock Low to Output Valid
TCK
TMS
TDI
TDO
Parameter
Parameter
Parameter
OL
OH
=2mA)
=-2mA)
t
CHCH
t
CLQV
Symbol
Symbol
V
V
V
TR/TF
V
V
V
IH
DD
OH
OL
IH
IL
t
/V
t
MVCH
DVCH
Symbol
IL
t
t
t
t
t
t
t
t
CHCH
MVCH
CHMX
DVCH
CHDX
CHCL
CLCH
CLQV
- 15
2.37
Min
-0.3
V
1.7
2.1
t
t
CHMX
CHDX
SS
t
CHCL
Min
50
20
20
5
5
5
5
0
2.5/0.0
1.0/1.0
Typ
2.5
1.25
Min
256Kx36 & 512Kx18 SRAM
-
-
-
-
Max
10
-
-
-
-
-
-
-
V
DD
Max
2.63
V
0.7
0.2
DD
+0.3
t
CLCH
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Unit
ns
V
V
V
V
V
V
V
January. 2002
Note
Note
Note
1
Rev 4.0