p502-26sc PhaseLink Corp., p502-26sc Datasheet - Page 2

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p502-26sc

Manufacturer Part Number
p502-26sc
Description
High Pull-range Vcxo 27mhz With Integrated Audio Pll
Manufacturer
PhaseLink Corp.
Datasheet
PIN DESCRIPTIONS
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/17/04 Page 2
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
GND_27MHz
VDD_27MHz
OUT_27MHz
GND_VCXO
VDD_VCXO
GND_Audio
REF_Audio
OUT_Audio
VDD_Audio
GND_PLL
VDD_PLL
Name
VCON
XOUT
N/C
XIN
High Pull-Range VCXO (27MHz) with integrated Audio PLL
Number
PARAMETERS
1,16
10
11
12
13
14
15
2
3
4
5
6
7
8
9
Type
O
O
O
P
P
P
P
P
P
P
P
I
I
I
No connection.
VDD power supply pin for PLL circuitry. This pin should be decoupled sepa-
rately from other VDD.
VDD power supply pin for VCXO circuitry. This pin should be decoupled
separately from other VDD.
Crystal input. See Crystal Specifications on page 4.
Crystal output. See Crystal Specifications on page 4.
Voltage Control input.
GND connection for VCXO circuitry.
GND connection for VCXO circuitry.
Audio Reference Clock input.
GND connection for Audio clock output buffer circuitry.
Audio clock output.
VDD power supply pin for Audio clock output buffer. This pin should be
decoupled separately from other VDD.
VDD power supply pin for 27MHz output clock. This pin should be decoup-
led separately from other VDD.
27MHz VCXO output clock.
GND connection for 27MHz output buffer circuitry.
SYMBOL
V
V
T
T
V
T
DD
O
S
A
J
I
Description
MIN.
-0.5
-0.5
-65
-40
PLL502-26
V
V
MAX.
DD
DD
150
125
260
4.6
85
2
+0.5
+0.5
UNITS
°C
°C
°C
°C
kV
V
V
V

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