TS2GDOM44H TRANSCEND [Transcend Information. Inc.], TS2GDOM44H Datasheet - Page 6

• Manufacturer Part Number: TS2GDOM44H
• Description: 44-Pin IDE Flash Module(Horizontal)
• Manufacturer: TRANSCEND [Transcend Information. Inc.]

Transcend Information Inc.
T
1
T
1
T
1
Pin Description
01
17, 15, 13, 11, 09, 07,
05, 03, 04, 06, 08, 10,
12, 14, 16, 18
21
23
25
27
28
29
31
32
r
2
2
r
2
r
a
a
a
8
8
8
n
n
n
M
M
M
Pin No.
s
s
s
c
c
~
c
~
~
e
e
e
4
4
4
n
n
n
G
G
G
d
d
d
B
B
B
4
4
4
4
4
4
-RESET
DD0 ~ DD15 (Device Data)
DMARQ (DMA Request)
-DIOW (I/O Write)
STOP (Stop UDMA Burst)
-DIOR (I/O Read)
-HDMARDY (UDMA ready)
HSTROBE (UDMA Strobe)
IORDY (I/O channel ready)
DDMARDY (UDMA ready)
DSTROBE (UDMA data
strobe)
CSEL (Cable select)
-DMACK (DMA
acknowledge)
INTRQ (Interrupt)
IOCS16B
-
-
-
P
P
P
i
i
i
n
n
n
I
I
I
Signal
D
D
D
E
E
E
F
F
F
l
l
l
a
a
a
s
s
s
h
h
h
M
M
M
I/O*
I/O
O
O
O
O
I
I
I
I
I
6
o
o
o
d
d
d
This is the strobe signal used by the host to read from
When UDMA mode DMA Read is ready, -HDMARDY
The device will assert this signal to indicate that the
Hardware reset signal from the host.
16-bit bi-direction Data Bus. DD(7:0) are used for 8-bit
register transfers.
For DMA data transfers. Device will assert DMARQ
when the device is ready to transfer data to or from the
host.
This is the strobe signal used by the host to write to the
device register or Data port.
The host asserts this signal during an UDMA burst to
stop the DMA burst.
the device register or the Data port.
should be asserted by the host to indicate that the host is
ready to receive DMA data-in burst.
HSTROBE receives the data-out strobe signal from the
host for an UDMA burst.
This signal is used to temporarily stop the host register
access (read or write) when the device is not ready to
respond to a data transfer request.
device is ready to receive UDMA data-out burst.
When UDMA mode DMA Read is active, this signal is
the data-in strobe generated by the device.
This pin is used to configure this device as Device 0 or
Device 1. When this pin is grounded, this device is
configured as Device 0. When this pin is High, this
device is configured as Device 1.
This signal is used by the host in response to DMARQ to
initiate DMA transfer.
When this device is selected, this signal is the active
high Interrupt Request to the host.
During PIO transfer mode 0, 1 or 2, this pin indicates to
the host the 16-bit data port has been addressed and the
device is prepared to send or receive a 16-bit data word.
When transferring in PIO mode 3, 4, or above, this signal
should not be used by the host, and all transfers will be
16-bit. When transferring in DMA mode, the host must
use a 16-bit DMA channel and this signal will not be
asserted.
u
u
u
l
l
l
e
e
e
(
(
(
H
H
H
o
o
o
r
r
r
i
i
i
z
z
z
o
o
o
n
Description
n
n
t
t
t
a
a
a
l
l
l
)
)
)
Ver 1.2