74HC/HCT107 Philips Semiconductors (Acquired by NXP), 74HC/HCT107 Datasheet - Page 7

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74HC/HCT107

Manufacturer Part Number
74HC/HCT107
Description
Dual JK Flip-flop With Reset; Negative-edge Trigger
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet
Philips Semiconductors
AC WAVEFORMS
PACKAGE OUTLINES
See
December 1990
Dual JK flip-flop with reset; negative-edge trigger
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V
Fig.6
(1) HC : V
Fig.7
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
HCT: V
HCT: V
Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the J
and K to nCP set-up and hold times, the output transition times and the maximum clock pulse frequency.
Waveforms showing the reset (nR) input to output (nQ, nQ) propagation delays, the reset pulse width and
the nR to nCP removal time.
M
M
M
M
= 50%; V
= 50%; V
= 1.3 V; V
= 1.3 V; V
I
I
I
I
= GND to V
= GND to V
= GND to 3 V.
= GND to 3 V.
CC
CC
.
.
.
7
74HC/HCT107
Product specification

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