IDT70V18L15PFI IDT [Integrated Device Technology], IDT70V18L15PFI Datasheet - Page 12

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IDT70V18L15PFI

Manufacturer Part Number
IDT70V18L15PFI
Description
HIGH-SPEED 3.3V 64K x 9 DUAL-PORT STATIC RAM
Manufacturer
IDT [Integrated Device Technology]
Datasheet
ADDR
ADDR
ADDR
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If t
3. Refer to Truth Table I - Chip Enable.
BUSY
BUSY
INTERRUPT TIMING
t
t
t
t
AS
WR
INS
INR
IDT70V18L
High-Speed 3.3V 64K x 9 Dual-Port Static RAM
and
Sym bol
CE
CE
APS
"A"
"B"
"A"
"B"
"B"
is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted.
"A"
"B"
"B"
Inte rrup t Se t Tim e
Inte rrup t Re se t Tim e
A d d re ss S e t-up Time
Write Re co v e ry Tim e
S
BUSY
BUSY
t
APS
(2)
t
APS
(2)
t
BAA
MATCHING ADDRESS "N"
Param eter
ADDRESS "N"
t
BAC
ADDRESSES MATCH
12
CE
Industrial and Commercial Temperature Ranges
t
t
Min.
BDA
BDC
____
____
0
0
Com 'l Only
70V18L15
Max.
____
____
15
15
Min.
S
____
____
0
0
70V18L20
Com 'l
& Ind
Max.
____
____
20
20
Preliminary
4854 drw 13
4854 drw 14
4854 tb l 1 5
Unit
ns
ns
ns
ns

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