ACS8515REV2.1T SEMTECH [Semtech Corporation], ACS8515REV2.1T Datasheet - Page 49

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ACS8515REV2.1T

Manufacturer Part Number
ACS8515REV2.1T
Description
Line Card Protection Switch for SONET or SDH Network Elements
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet

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Summary
Summary
Input Edge Alignment for 8k locking mode
Input Edge Alignment for 8k locking mode
Low Jitter n x E1/DS1 Mode
Low Jitter n x E1/DS1 Mode
Table 31.
Table 31.
Summary
Summary
Summary
This section summarizes the minor changes and improvements made to the ACS8515 from Rev2.0 to Rev2.1.
The bulk of these changes are designed to remove the need for software work arounds associated with Phase
Build Out.
Two new features have been added, necessitating changes to the control software. These are described in detail
below.
Input Edge Alignment for 8k locking mode
Input Edge Alignment for 8k locking mode
Input Edge Alignment for 8k locking mode
An additional bit in the register cnfg_control1 (Bit 2) has been allocated to select which edge of the input
reference to lock to when the device is configured in 8k locking mode.
This bit, when set to one ensures that the rising edge of the output clock phase locks to the rising edge of the
input clock, when 8k locking mode is used on the input.
Low Jitter n x E1/DS1 Mode
Low Jitter n x E1/DS1 Mode
Low Jitter n x E1/DS1 Mode
A second bit of the cnfg_control1 register has been allocated to controlling what frequency is fed into the APLL.
This allows the user to switch from the normal 77.76MHz to twice the dig2 output frequency.
This has the effect of replacing the normal OC/STM outputs with multiples of the E1 or DS1 rate. The E1/DS1
choice is controlled by the SONET/SDH bit in the cnfg_mode register.
Table 31.
Table 31.
Table 31. Changes from Revision 1.05 to 2.00 September 2003.
Revision 2.01/December 2005 Semtech Corp.
ADVANCED COMMUNICATIONS
Appendix A Rev2.1 Changes Described
Appendix A Rev2.1 Changes Described
Appendix A Rev2.1 Changes Described
Appendix A Rev2.1 Changes Described
Appendix A Rev2.1 Changes Described
Revision History
Revision History
Revision History
Revision History
Revision History
Item
1
Non-Revertive
Mode
Section
Page
29
Updated Non-Revertive mode description
49
ACS8515 Rev2.1 LC/P
Description
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FINAL

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