NJU26123V NJRC [New Japan Radio], NJU26123V Datasheet - Page 4

• Manufacturer Part Number: NJU26123V
• Description: Digital Signal Processor for TV
• Manufacturer: NJRC [New Japan Radio]

NJU26123
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Table 1 Pin Description
* I : Input, O : Output, I/O: Bi-directional, OD: Open-Drain I/O, PI: Power Supply Bypass
AD1 (No.16) pin and PROC (No.17) pin are input pins. WDC (No.18) pin is open-drain pin with pull-up resistance.
However, these pins operate as bi-directional pins. No.16pin and No.17pin connect with V
resistance. No.18pin do not connect or connect with V
VREGO (No.12) pin is a built-in power supply bypass pin. Connect low-ESR capacitor of 4.7uF and 0.01uF in parallel
between VSS (No.11) pin. A built-in power supply is used only for NJU26123 operation. Be not short-circuited of this pin.
Do not take out the current, and connect other power supplies.
No.
1
2
3
4
5
6
7
8
9
10
11
12
- 4 -
Pin Configuration
Pin Description
Symbol
RESETb I
LR
BCK
SDI2
SDI1
SDI0
MCK
VDD
VSS
STBYb
VSS
VREGO
RESETb
VREGO
STBYb
MCK
BCK
SDI2
SDI1
SDI0
VDD
VSS
VSS
LR
I/O
I/O
I/O
I
I
I
I/O
-
-
I
-
PI
Description
RESET (active Low)
LR Clock
Bit Clock
Audio Data Input 2 L/R
Audio Data Input 1 L/R
Audio Data Input 0 L/R
Master Clock
Power Supply +3.3V
GND
For TEST (Connected to VDD)
GND
Built-in Power Supply Bypass
10
11
12
1
2
3
4
5
6
7
8
9
Fig. 3 NJU26123 Pin Configuration
DD
NJU26123
SSOP24
through 3.3kΩ resistance when unused.
No.
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
SLAVEb
AD1
PROC
WDC
SDO1
SDO2
SCL
TEST
CLKOUT
CLK
SDO0
SDA
I/O
O
I
I
I
I
OD
O
O
O
OD
I
I
24
23
22
21
20
19
18
17
16
15
14
13
Slave select
Status select after Reset DSP
Clock for Watch Dog Timer
Audio Data Output 2 L/R
Description
OSC Output
OSC Clock Input
I
Audio Data Output 0 L/R
Audio Data Output 1 L/R
I
I
For TEST(Connected to VSS)
2
2
2
C Address
C I/O
C Clock
DD
CLKOUT
SLAVEb
PROC
SDO2
SDO1
SDO0
TEST
WDC
SDA
or V
SCL
AD1
CLK
SS
through 3.3kΩ
Ver.2008-04-17