IDT7200L IDT [Integrated Device Technology], IDT7200L Datasheet - Page 7

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IDT7200L

Manufacturer Part Number
IDT7200L
Description
CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (
reset by using rising edge of the read operation.
nected to Expansion Out (
output acts as a signal to the next device in the Daisy Chain
NOTES:
1.
2.
Q
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
HF
D
FF
W
R
0
0
EF
W
In the Depth Expansion Mode, Expansion In (
,
– Q
– D
RS
EF
FF
W
and
,
R
FF
W
R
8
8
,
R
HF
= V
LAST WRITE
may change status during Reset, but flags will be valid at t
IH
around the rising edge of
t
WFF
t
RLZ
t
XO
A
IGNORED
t
WPW
WRITE
) of the previous device. This
t
RS
RC
t
DATA OUT VALID
DATA IN VALID
.
WC
t
DS
Figure 3. Asynchronous Write and Read Operation
Figure 4. Full Flag From Last Write to First Read
FIRST READ
t
RR
t
HF
DV
t
XI
RS
t
DH
) is then
) is con-
t
WR
t
t
HFH
RFF
Figure 2. Reset
t
RSC
t
, t
EFL
t
t
RSC
RSS
A
FFH
t
.
RPW
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
ADDITIONAL
t
by providing a pulse to the next device when the previous
device reaches the last location of memory.
DATA OUTPUTS (Q
impedance condition whenever Read (
RSS
READS
Data outputs for 9-bit wide data. This data is in a high
DATA OUT VALID
DATA IN VALID
WRITE
FIRST
t
RHZ
0
– Q
t
8
RSR
)
R
) is in a high state.
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