IDT72V223 IDT [Integrated Device Technology], IDT72V223 Datasheet - Page 41

• Manufacturer Part Number: IDT72V223
• Description: 3.3 VOLT HIGH-DENSITY SUPERSYNC NARROW BUS FIFO
• Manufacturer: IDT [Integrated Device Technology]

SYSTEM INTERFACE PARAMETERS
NOTE:
1. 50pf loading on external output signals.
TRST
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC II
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
Data Output Hold
TDI/
TMS
TDO
TCK
Data Output
Parameter
Data Input
t
DO
Symbol
t
3
t
DOH
t
t
= Max
DS
DH
t
5
(1)
Test Conditions
t
t
t
rise=3ns
fall=3ns
1
t
6
t
t
4
t
DS
TCK
Min.
t
10
10
0
DH
-
IDT72V223
IDT72V233
IDT72V243
IDT72V253
IDT72V263
IDT72V273
IDT72V283
IDT72V293
Figure 31. Standard JTAG Timing
Notes to diagram:
t1 = t
t2 = t
t3 = t
t4 = t
t5 = t
t6 = t
t
Max. Units
2
20
-
-
-
TCKRise
RST
RSR
TCKLOW
TCKHIGH
TCKFALL
(reset pulse width)
(reset recovery)
ns
ns
ns
TM
41
NARROW BUS FIFO
(V
NOTE:
1. Guaranteed by design.
JTAG AC ELECTRICAL
CHARACTERISTICS
JTAG Clock Input Period t
JTAG Clock HIGH
JTAG Clock Low
JTAG Clock Rise Time
JTAG Clock Fall Time
JTAG Reset
JTAG Reset Recovery
CC
TM
NARROW BUS FIFO
= 3.3V
Parameter
±
5%; Tcase = 0°C to +85°C)
Symbol
t
t
t
t
t
t
TCK
TCKHIGH
TCKLOW
TCKRise
TCKFall
RST
RSR
COMMERCIAL AND INDUSTRIAL
Conditions Min.
t
Test
DO
-
-
-
-
-
-
-
TEMPERATURE RANGES
100
40
40
50
50
-
-
TDO
Max. Units
5
5
-
-
-
-
-
(1)
(1)
4666 drw34
ns
ns
ns
ns
ns
ns
ns