lc74776m Sanyo Semiconductor Corporation, lc74776m Datasheet - Page 24

• Manufacturer Part Number: lc74776m
• Description: Vps/pdc Video On-screen Display
• Manufacturer: Sanyo Semiconductor Corporation

COMMAND14 (VPS/PDC control setup command) I
• First byte
• Second byte
Note: All registers are set to 0 when the LC74776/M is reset by the RST pin.
DA 0 to 7
DA 0 to 7
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
VMWSE2
VMWSEL
Register
Register
HBS2
HBS1
BMS
EMS
DCE
–
–
–
–
–
–
–
–
–
State
State
1
1
1
1
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Second byte identification bit
V mask period start - From the retrace period
V mask period start - From 10H before the retrace period
The V mask period is the retrace period
The V mask period is 9H
Clock running discrimination 1 (2 times)
Clock running discrimination 2 (4 times)
Framing code discrimination 1
Framing code discrimination 2 (Single bad bits are ignored)
Error check valid (Error checking can be turned on or
off on a per-byte basis.)
Error check invalid (Applications can select whether data for
which an error is detected is held or writing on a per-byte basis.)
Data hold
Data write
(When the error bit is 0 in VPS mode.)
Error checking enabled for unused data bytes.
VPS: bytes 3, 4, and 6 to 10, PDC: bytes 7 to 12, header 1:
bytes 14 to 37, header 2: bytes 14 to 29, header 3: bytes 14
to 21, status 1 (3): bytes 7 to 25, status 2 (4): bytes 7 to 35
Error checking disabled for unused data bytes.
VPS: bytes 3, 4, and 6 to 10, PDC: bytes 7 to 12, header 1:
bytes 14 to 37, header 2: bytes 14 to 29, header 3: bytes 14
to 21, status 1 (3): bytes 7 to 25, status 2 (4): bytes 7 to 35
Command 7 identification code.
Display control setup.
Extended command 6 identification code
LC74776, 74776M
2
Contents
Function
Contents
Function
C bus only
When set to 0, if there are no errors in bytes
for which error checking is turned on, those
bytes are written to P-S. When set to 1, all
bytes are written to P-S regardless of the error
status.
Specifies handling of bytes for which error
checking is set to off but in which an error
occurred when error checking is turned on
CPOUT pin (pin 13) V mask period switching 2
CPOUT pin (pin 13) V mask period switching
Clock running discrimination count setting
Framing code discrimination selection
Error checking setting for unused data bytes.
Biphase (VPS), Hamming (PDC), and odd
parity (header)
Notes
Notes
No. 6018-24/35