IDT79R3041-16 IDT [Integrated Device Technology], IDT79R3041-16 Datasheet

IDT79R3041-16

Manufacturer Part Number

IDT79R3041-16

Description

Manufacturer

IDT [Integrated Device Technology]

Datasheet

1.IDT79R3041-16.pdf (34 pages)

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FEATURES:

• Instruction

• High level of integration minimizes system cost

• On-chip instruction and data caches

• Flexible bus interface allows simple, low-cost designs

RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trademarks, and the IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

and RISController Family MIPS RISC CPUs

— RISC CPU

— Multiply/divide unit

— Instruction Cache

— Data Cache

— Programmable bus interface

— Programmable port width support

— 2KB of Instruction Cache

— 512B of Data Cache

— Superset pin-compatible with RISController

— Adds programmable port width interface

— Adds programmable bus interface timing support

Integrated Device Technology, Inc.

(8-, 16-, and 32-bit memory sub-regions)

(Extended address hold, Bus turn around time,

Read/write masks)

set

compatible

ClkIn

Int(5:3)

SInt(2:0)

Generator

Clock

Unit

with

IDT79R3041

INTEGRATED RISController

LOW-COST SYSTEMS

IDT79R3000A

Exception/Control

System Control

Unpack

Coprocessor

4-deep

Bus Interface

Address/

Buffer

Figure 1. R3041 Block Diagram

Data

Write

Unit

Physical Address Bus

Registers

Data

PortSize

Counter

Instruction

Cache

Bus Interface Unit

™

R3051 Superset

2kB

4-deep

Buffer

Pack

Data

Read

Master Pipeline Control

Unit

DMA

Virtual Address

Ctrl

• Double-frequency clock input

• 16.67MHz, 20MHz, 25MHz and 33MHz operation

• 20MIPS at 25MHz

• Low cost 84-pin PLCC packaging

• On-chip 4-deep write buffer eliminates memory write stalls

• On-chip 4-word read buffer supports burst or simple block

• On-chip DMA arbiter

• On-chip 24-bit timer

• Boot from 8-bit, 16-bit, or 32-bit wide PROMs

• Pin- and software-compatible family includes R3041, R3051,

• Complete software support

Data Bus

reads

R3052

— Optimizing compilers

— Real-time operating systems

— Monitors/debuggers

— Floating Point emulation software

— Page Description Languages

Arbiter

Timing/ Interface

DMA

Ctrl

™

Control

, and R3081

General Registers

Cache

512B

Data

Address Adder

Mult/Div Unit

Control

SysClk

™

PC Control

CPU Core

(32 x 32)

BIU

Shifter

FOR

Integer

ALU

SBrCond(3:2)

™

2905 drw 01

IDT79RV3041

IDT79R3041

MARCH 1996

DSC-2905/5

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