cxa1734s Sony Electronics, cxa1734s Datasheet - Page 16

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cxa1734s

Manufacturer Part Number
cxa1734s
Description
Us Audio Multiplexing Decoder
Manufacturer
Sony Electronics
Datasheet

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5
6
SAP block filter adjustment
1. TEST BIT is set to “TEST1 = 1” and “TEST-DA = 0”.
2. Input a 88 kHz, 120 mVrms sine wave signal to COMPIN. While monitoring the STATUS FLAG (STA4)
3. Adjustment range:
Separation adjustment
1. TEST BIT is set to “TEST1 = 0” and “TEST-DA = 0”.
2. Set the unit to stereo mode and input the left channel only signal (modulation factor 30%, frequency
3. Next, set the frequency only of the input signal to 3 kHz and adjust the “SPECTRAL” adjustment data
4. Then, the adjustments in 2 and 3 above are performed to optimize the separation.
5. “WIDEBAND”
condition, vary and adjust the “SAPLPF” adjustment data.
Adjustment bits:
Align SAPLPF with the center of the STA4 = 1 (adjustment OK) condition range.
300 Hz) to COMPIN. At this time, adjust the “WIDEBAND” adjustment data to reduce ROUT output to
the minimum.
to reduce ROUT output to the minimum.
Adjustment range:
Adjustment bits:
1
0
0
±20%
4 bits
±30%
6 bits
“SPECTRAL”
Adjustment range:
Adjustment bits:
Adjustment point
—16—
±15%
6 bits
F
Control data
"SAPLPF"
Measurement data
STA4 "SAPLPF"
CXA1734S

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