SL2305 SPECTRALINEAR [SpectraLinear Inc], SL2305 Datasheet - Page 7
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SL2305
Manufacturer Part Number
SL2305
Description
Low Jitter and Skew 10 to 140 MHz Zero Delay Buffer (ZDB)
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
1.SL2305.pdf
(11 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SL2305SC-1H
Manufacturer:
SILICONLA
Quantity:
20 000
Part Number:
SL2305SI-1HT
Manufacturer:
SILICONLA
Quantity:
20 000
SL2305
External Components & Design Considerations
Typical Application Schematic
Comments and Recommendations
Decoupling Capacitor: A decoupling capacitor of 0.1 F must be used between VDD and VSS on the pins 6 and 4. Place
the capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and to
the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD pin.
Series Termination Resistor: A series termination resistor is recommended if the distance between the outputs and the
load is over 1 ½ inch. The nominal impedance of the Clock outputs are about 30
. Use 20
resistor in series with the
output to terminate 50 trace impedance and place 20
resistor as close to the clock outputs as possible.
Zero Delay and Skew Control: All outputs and CLKIN pins should be loaded with the same load to achieve “Zero Delay”
between the CLKIN and the outputs. The CLKOUT pin is connected to CLKIN internally on-chip for internal feedback to
PLL, and sees an additional 2 pF load with respect to the clock pins. For applications requiring zero input/output delay, the
load at the all output pins including the CLKOUT pin must be the same. If any delay adjustment is required, the capacitance
at the CLKOUT pin could be increased or decreased to increase or decrease the delay between clocks and CLKIN.
For minimum pin-to-pin skew, the external load at the clock outputs must be the same.
Rev 1.4, May 25, 2007
Page 7 of 11