cxd2450r Sony Electronics, cxd2450r Datasheet

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cxd2450r

Manufacturer Part Number
cxd2450r
Description
Timing Generator For Progressive Scan Ccd Image Sensor
Manufacturer
Sony Electronics
Datasheet

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Part Number:
CXD2450R
Manufacturer:
SONY
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6 584
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cxd2450r-T4
Manufacturer:
ALPS
Quantity:
1 471
Description
generates the timing pulses for performing progressive
scan readout for digital still camera and personal
computer
ICX098AK CCD image sensor.
Features
• Base oscillation frequency 36.81MHz (2340f
• Monitoring readout allowed
• High-speed/low-speed electronic shutter function
• Horizontal driver for CCD image sensor
• Vertical driver for CCD image sensor
• Signal processor IC system clock generation
• Vertical/horizontal sync (SSG) timing generation
Applications
• Digital still cameras
• Personal computer image input
Structure
Pin Configuration
DSGAT
OSCO
Groups of pins enclosed in the figure indicate sections for which power supply separation is possible.
The CXD2450R is a timing generator IC which
This chip has a built-in vertical driver.
1170f
Silicon gate CMOS IC
VSUB
OSCI
MCK
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Timing Generator for Progressive Scan CCD Image Sensor
V2a
V2b
VM
VH
VL
V1
V3
47
H
44
45
46
48
37
38
39
41
42
43
40
, 780f
36 35 34
1
image
2
H
3
33
4
input
32
5
31
6
30
applications
7
29
8
28
9 10 11 12
27
26
using
25
19
17
16
15
14
13
24
23
20
18
22
21
H
)
V
XRS
XCLPDM
V
3/2MCK
1/2MCK
PBLK
XSHD
XSHP
V
V
H2
SS
DD
DD
DD
the
4
5
4
3
– 1 –
Absolute Maximum Ratings
• Supply voltage
• Input voltage
• Output voltage
• Operating temperature
• Storage temperature
Recommended Operating Conditions
• Supply voltage
• Operating temperature
Applicable CCD Image Sensors
ICX098AK (Type 1/4 CCD)
V
DD
a, V
CXD2450R
DD
48 pin LQFP (Plastic)
b, V
DD
V
V
V
V
V
V
Topr
Tstg
V
V
V
Topr
c, V
DD
M
H
L
I
O
M
H
L
V
V
DD
SS
SS
V
V
V
V
d
SS
L
L
L
– 0.5 to V
– 0.5 to V
–55 to +150
14.5 to 15.5
–5.0 to –6.0
– 0.5 to +26.0
– 0.5 to +26.0
– 0.5 to +26.0
–20 to +75
–20 to +75
3.0 to 3.6
– 0.5 to +7.0
0.0
DD
DD
E97819A9X
+ 0.5
+ 0.5
°C
°C
°C
V
V
V
V
V
V
V
V
V
V

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cxd2450r Summary of contents

Page 1

... Timing Generator for Progressive Scan CCD Image Sensor Description The CXD2450R is a timing generator IC which generates the timing pulses for performing progressive scan readout for digital still camera and personal computer image input applications ICX098AK CCD image sensor. This chip has a built-in vertical driver. ...

Page 2

... SSG 1/390 1/525 1/3 Pulse Generator HRI differential Latch Latch 1/2 Register – 2 – CXD2450R PBLK 15 XCLPDM 7 XCLPOB WEN V2a 44 V2b VSUB Driver ...

Page 3

... Serial interface data input for internal mode settings. 28 SSK I Serial interface clock input for internal mode settings. 29 SEN I Serial interface strobe input for internal mode settings. CHKSUM enable. (With pull-down resistor) 30 EBCKSM I High: Sum check invalid, Low: Sum check valid Description ) – 3 – CXD2450R ) ) H ...

Page 4

... V2b O CCD vertical register clock output. (Ternary output) 45 VSUB O CCD electronic shutter pulse output — –5.5V system power supply. (Power supply for vertical driver) 47 OSCO O Inverter output for oscillation. 48 OSCI I Inverter input for oscillation. Description ) – 4 – CXD2450R ...

Page 5

... V Pull-in current where I = 10.0mA OL9 OL V Feed current where I = –7.2mA OH10 OH V Pull-in current where I = 5.0mA OM101 OM V Feed current where I = –5.0mA OM102 OM V Pull-in current where I = 10.0mA OL10 OL – 5 – CXD2450R Min. Typ. Max. Unit 3.0 3.3 3.6 V 3.3 3.6 3.0 V 3.3 3.6 3.0 V 3.3 3.6 3.0 V 15.0 15.5 14.5 V 0.0 — ...

Page 6

... Vss (Within the recommended operating conditions) Symbol Conditions LVth fmax 50MHz sine wave IN Conditions – 6 – CXD2450R Min. Typ. Max. Unit d/2 V ...

Page 7

... Switching Waveforms TTLM V2a (V2b) 10% TTLM 90% V1 (V3) 10% VSUB Waveform Noise VCLH TTMH TTHM 90% 90% 10% 10% 90% TTLH TTHL 90% 90% 10% 10% VCMH VCLL – 7 – CXD2450R VH TTML VM 90% 10% VL TTML VM 90% 10 VCML VL ...

Page 8

... Measurement Circuit +3.3V –5.5V +15. 3MCK R1: 68W C1: 450pF R2: 15W C2: 2200pF C3: 500pF Serial interface data C4: 30pF C5: 100pF C6: 10pF – 8 – CXD2450R ...

Page 9

... DD ts2 th2 (Within the recommended operating conditions) Definition Example: During recording drive mode Enlarged view d DD ts4 th4 0. (Within the recommended operating conditions) Definition – 9 – CXD2450R 0. Min. Typ. Max. Unit Min. Typ. ...

Page 10

... Normally, the serial interface data is loaded to the CXD2450R at the timing shown in 2) above. However, one exception to this is when the data such as SSGSEL and STB is loaded to the CXD2450R and controlled at the rising edge of SEN. For STB, see control data D62 to D63 STB in "Description of Operation". ...

Page 11

... DD (Within the recommended operating conditions) Definition 0. tpDSGAT (Within the recommended operating conditions) Definition 0. tpd2 (Within the recommended operating conditions) Definition – 11 – CXD2450R 0. Miin. Typ. Min. Unit 0. Miin. Typ. Min. Unit 100 ns Miin ...

Page 12

... DD DD 0. trH1 tfH1 0. 0. trRG tfRG (Within the recommended operating conditions) Definition (Within the recommended operating conditions) Definition – 12 – CXD2450R b Min. Typ. Max. Unit Min. Typ. Max. Unit ...

Page 13

... An example of the initialization data for the CXD2450R control data is shown below. This data is based on the Application Circuit Block Diagram, so care should be taken as there are some differences from the RST pin initialization data ...

Page 14

... Monitoring OFF ON OFF OFF OFF ON Positive polarity Negative polarity See D60 to D61 DSG table. See D62 to D63 STB table. See D64 to D71 CHKSUM. – 14 – CXD2450R Data = 1 When a reset All 0 All 0 All 0 All 0 All 0 — All — All 0 Recording ...

Page 15

... D16 to D35 Electronic shutter mode The CXD2450R's electronic shutter mode can be switched as follows by SMD D16 to D17 . Handling of the data from D18 to D35 differs according to the mode, and is explained in detail below. ...

Page 16

... For monitoring drive mode, care should be taken as the Shut.HD value has an offset. This is so that the CXD2450R can obtain basically the same exposure time for the same Shut.HD value during high-speed shutter independent of the drive mode. ...

Page 17

... During HTSG control mode – 17 – CXD2450R Shutter speed (s) Calculation results (s) 1 1/60 1/60 2 1/60 1/60 2 1/50 1/50 2 1/30 1/30 2 1/8 1/8 2 1/6 1/6 3 1/50 1/50 3 1/40 1/40 ...

Page 18

... See the timing charts for the vertical/horizontal sync signals in accordance with each mode. Note that when switching from monitoring drive to recording drive mode, the pixels decimated thus far must be cleaned. Concretely, this operation is supported by generating VSUB, but the CXD2450R facilitates this control by using D48 EXPOSE. (See the figure.) FRI ...

Page 19

... D60 to D61 DSG The CXD2450R can apply stop control to the CCD pulses and pulses for the sample-and-hold and analog/digital conversion ICs by setting the DSGAT pin low. Conversely, when the DSGAT pin is set high, the controlled pulses can be switched as follows using the serial interface data. ...

Page 20

... D62 to D63 STB This switches the operating mode as shown below. However, the IC pin status control bit is loaded to the CXD2450R and controlled immediately at the rise of the SEN input. D63 D62 Symbol X 0 Normal operating mode CAMERA 0 1 Sleep mode SLEEP 1 1 Standby mode ...

Page 21

... D47 D46 D45 D44 D43 D42 D41 D40 D55 D54 D53 D52 D51 D50 D49 D48 D63 D62 D61 D60 D59 D58 D57 D56 +) D71 D70 D69 D68 D67 D66 D65 D64 LSB CHKSUM Reflected when the total is 0. – 21 – CXD2450R ...

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Page 29

... VSUB pin of the CCD image sensor from going to negative potential. t1 20% 20 DRV OUT S/H A/D VRT CXA2006Q CXD2310AR VRB CXD2450R 34 33 V-Dr 32 SSG – 29 – CXD2450R 3/2MCK 1/2MCK ID Signal WEN Processor Block MCK FRI HRI HRO FRO Controller 15.0V 0V –5.5V ...

Page 30

... EIAJ CODE JEDEC CODE 48PIN LQFP (PLASTIC (0.22 0.2 1.5 – 0.1 0.1 ± 0.1 NOTE: “ ” Dimensions do not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT – 30 – CXD2450R + 0.05 0.127 – 0.02 0.1 EPOXY / PHENOL RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.2g ...

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