cxd2085m Sony Electronics, cxd2085m Datasheet - Page 6

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cxd2085m

Manufacturer Part Number
cxd2085m
Description
Id-1 Detection
Manufacturer
Sony Electronics
Datasheet

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4. Clock
The CXD2085M requires a 4fsc clock (14.318MHz). When using a crystal oscillator, connect it between XI (Pin
13) and XO (Pin 12).
When inputting the clock from an external source, input it to XI (Pin 13).
5. Various Settings and Data I/O
The various settings and data I/O can be made by using the pin directly or using I
5-1. I
By setting MCON (Pin 3) to High, the various settings and data extraction can be made with the I
The CXD2085M supports the I
is 40 (H).
In addition to standard mode (max. 100K bits/s), this IC also supports high-speed mode (max. 400K bits/s).
Even when the power supply falls to 0V, it does not occupy the I
ratings should not be exceeded.
The I
The number of transmission data is one byte for write (RECEIVER) and two bytes for read (TRANSMITTER).
There is no sub-address setting function. Note that the I
resetting by the XRST pin (Pin 1).
Data write (RECEIVER mode)
Data read (TRANSMITTER mode)
2
2
C bus
C bus transmission process is shown in the figure below.
Sm
Sm
Symbol
DATA
SLA
XA
W
S
P
R
A
m
s
7654321
7654321
SLAm
SLAm
from Master to Slave
from Slave to Master
Start Condition
Stop Condition
Slave Address
Data
0: Write
1: Read Slave
Clock pulse for Acknowledgment (SDA: L)
Acknowledgment none (SDA: H)
Wm
Rm
0
0
2
Master
C bus slave RECEIVER and slave TRANSMITTER modes. The slave address
As
As
1
1
76543210
76543210
DATAm
DATAs
Slave
Master
Description
Am
As
1
1
– 6 –
76543210
DATAs XAm
P
2
C bus transmission cannot be performed during
1
2
C bus. However, the absolute maximum
P
2
C bus interface.
2
C bus.
CXD2085M

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