SM5320A NPC [Nippon Precision Circuits Inc], SM5320A Datasheet
SM5320A
Related parts for SM5320A
SM5320A Summary of contents
Page 1
... The cutoff frequency and signal input type 2 can be controlled using an I C-BUS to three SM5320A on the same bus. The output gain can be varied in the range of 0dB ± 2.1dB (max step: 0.15dB) for each Y/C block and HD block individually using the I *1. When the resistor connected to ISET (R ISET 2 *2 ...
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... VCC3 CH-1 Clamp/ IN2 Bias CH-2 VCC4 Clamp/ IN3 Bias VCC5 CH-3 Note. The recommended value of the external resistor (R SM5320A ADS 5th order Gain Control LPF (6MHz) −2.1dB to + 2.1dB 5th order Gain Control LPF (6MHz) −2.1dB to + 2.1dB Bypass 5th order Gain Control LPF − ...
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... VCC2 – 24 GND4 – 25 YOUT O 26 VCC3 – 27 COUT O 28 GND5 – *1. I: input, O: output *2. A: analog, D: digital SM5320A *2 A/D Description A Video signal input (C) A Video signal input (Y) A Analog supply 4 D Digital supply data signal input/output clock signal input ...
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... PIN EQUIVALENT CIRCUITS *1 Number Name I/O 14 IN1 13 IN2 I 12 IN3 25 YOUT 27 COUT 18 OUT1 O 20 OUT2 22 OUT3 16 REF O 2 YIN I SM5320A Equivalent circuit VCC INn GND VCC YOUT COUT OUTn GND YIN 130Ω SEIKO NPC CORPORATION —4 VCC REF GND ...
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... I/O 1 CIN I 5 SDA I/O 6 SCL I 15 ADS I *1. I: input, O: output Note. Resistance values in the equivalent circuits indicate design values. SM5320A Equivalent circuit 20kΩ CIN 130Ω 200Ω 250Ω SDA GND 180Ω SCL GND VCC 250Ω ADS GND ...
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... HIGH-level input leakage current I LH SDA output voltage V OL *1. Total of current consumption of VCC1, VCC2, VCC3, VCC4, VCC5 and VDD, when no input signals. SM5320A Condition VCC1, VCC2, VCC3, VCC4, VCC5, VDD ADS, SDA, SCL, INn ( Condition VCC1, VCC2, VCC3, VCC4, VCC5 ...
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... SDA, SCL rise time t r SDA, SCL fall time t f SCL setup time (stop condition) t SU;STO SDA, SCL input capacitance C i SDA LOW SCL t t HD;STA HD;DAT S SM5320A Condition min 0 0.6 1.3 0.6 0.6 0 100 − − 0.6 − SU;DAT f HD;STA t t HIGH SU;STA Sr Note ...
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... R half2 4fc attenuation Filter bypass mode passband F BP *1. The passband that the attenuation from fin = 100kHz is ≤ 1dB. A SM5320A = 1.0Vp- Condition min Clamp input, no signal input, 1.80 IN1, IN2, IN3 No signal input, YIN 1.45 Bias input, no signal input, 2.25 IN1, IN2, IN3 No signal input, CIN 2 ...
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... Filter bypass mode gain error dA VBP Channel to channel gain error dA VCH Maximum output voltage V out1 Output distortion T HD1 Drive load resistance response time T IC SM5320A = 1.0Vp- Condition Min = fin 6MHz/100kHz – 1.5 = fin 27MHz/100kHz 30 − 100kHz to 5MHz = 1.0Vp- Condition min − 0.5 GS1 = 04h − ...
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... REF output voltage V R Test level The definition of “Test Level” shown in the electrical characteristic table is as follows 100% of products tested 25° Guaranteed as result of design and characteristics evaluation. SM5320A = 1.0Vp- Condition GS2 = 04h GS2 = 20h GS2 = 1Fh YOUT, THD < 1.5% COUT, THD < ...
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... CIN 4.7µF + YIN 4.7µF + IN3 4.7µF + IN2 4.7µF + IN1 Note. This is a circuit only for the evaluation board of an electric characteristics. (It is not a recommended application circuit.) SM5320A 0.1µF CIN GND5 YIN COUT VCC4 VCC3 VDD YOUT SDA GND4 SCL VCC2 GND6 ...
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... Basic Cycle The write sequence is: SM5320A slave address → specific control register sub-address → write data. Data can be written to the SM5320A in successive bytes, as the sub-address for the register is incremented automatically after each byte. However, if the sub-address exceeds the address of the last register (03h), data write operation to the SM5320A register stops and the acknowledge signal is not returned ...
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... The 7-bit slave address is selected using the ADS pin. When ADS = “L” the address is 48h (1001000b), when ADS = “H” the address is 49h (1001001b), and when ADS = “Z” (open) the address is 4Ah (1001010b). A maximum of three SM5320A devices can be connected to the same I independently by setting the slave address of each using the ADS pin. When writing to control register, send sub address of control register following slave address ...
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... Input type switching (sync-tip clamp, bias) Register name: CB Address: Sub address = 01h, bit7 to bit2 Control register Sub address 01h bit7 bit6 bit5 bit4 * Sets the input method of IN1, IN2, IN3. SM5320A Flag name FC6 FC5 FC4 FC3 FC2 ...
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... Sub address 01h bit1 0 Filter mode. The signals is output to OUT1, OUT2, OUT3 passing through filter. (default) 1 Filter bypass mode. The signals is output to OUT1, OUT2, OUT3 without passing through filter. Sets the use or nonuse of filter. SM5320A Description Description Description SEIKO NPC CORPORATION —15 ...
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... Sets the output gain of YOUT, COUT. SM5320A Control register Sub address 02h bit2 bit1 bit0 (HEX 20h 21h 22h : 3Eh 3Fh ...
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... Lowpass Filter The SM5320A has built-in 5th-order lowpass filters with variable cutoff frequency. The cutoff frequency range is set by the resistor (R ) connected between ISET and GND, and the cutoff frequency setting is determined by ISET FCDATA data. The cutoff frequency vs. FCDATA values are listed in table 1, and shown graphically in figure 2. ...
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... CH-1 and CH-2/CH-3 varies. Filter Bypass Mode In filter bypass mode, the internal lowpass filter in SM5320A is bypassed and the signal is input to the output buffer stage directly. In filter bypass mode, the input type and output gain are set just as for filter mode. But the cutoff frequency setting and fc mode setting have no effect on the outputs ...
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... The recommended value is 10kΩ. Power Supply Invest Timing The SM5320A uses 2-type power supply, analog one (VCC1, VCC2, VCC3, VCC4, VCC5) and digital one (VDD). Therefore all power supply pins should be forced voltage at the same time power supply invested. In the case analog power supply and digital one are set up separately, composing system the time-lag to makes short time as standard under 1ms is need ...
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... Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0 Frequency [MHz] Figure 8. Gain and Phase characteristics (half fc mode, FCDATA = 10) SM5320A = 1.0Vp- 360 6 270 0 180 –6 Gain 90 –12 0 –18 –24 –90 –180 –30 –270 –36 –360 – ...
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... FCDATA = 227 –6 Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0 Frequency [MHz] Figure 14. Gain and Phase characteristics (CH = Y/C) SM5320A 360 6 270 0 180 –6 Gain 90 –12 0 –18 –90 –24 –180 –30 –36 –270 –360 –42 –450 – ...
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... V [V] CC Figure 18. I vs. V CC3 –1 –2 –3 4.5 4.75 5 5.25 V [V] CC Figure 20. Gain vs SM5320A 140 120 100 –20 0 5.5 *1. filter mode, FCDATA = 255 *2. filter bypass mode Figure 17. I 500 400 300 200 100 0 5.5 –20 0 Figure 19 ...
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... Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SM5320A SEIKO NPC CORPORATION 15-6, Nihombashi-kabutocho, Chuo-ku, ...