SS809 SSC [Silicon Standard Corp.], SS809 Datasheet - Page 7

no-image

SS809

Manufacturer Part Number
SS809
Description
3-Pin Microprocessor Reset Circuits
Manufacturer
SSC [Silicon Standard Corp.]
Datasheet
9/20/2006 Rev.3.01
APPLICATION INFORMATION
DETAIL ED DESCRIPTIONS OF TECHNICAL TERMS
RESET OUTPUT
The µP will be activated at a valid reset state. These
µP supervisory circuits assert reset to prevent code
execution errors during power-up, power-down, or
brownout conditions.
V
threshold, an internal timer keeps RESET low for
the reset timeout period; after this interval, RESET
goes high.
If a brownout condition occurs (V
reset threshold), RESET goes low. Any time V
goes below the reset threshold, the internal timer
resets to zero, and RESET goes low. The internal
timer is activated after V
NEGATIVE-GOING VCC TRANSIENTS
power-up, power-down, and brownout conditions, the
SS809G series are relatively resistant to short -duration
negative-going VCC transients.
ENSURING A VALID RESET OUTPUT DOWN TO
VCC=0
When VCC falls below 0.9V, the SS809G RESET
output no longer sinks current; it becomes an open
circuit. In this case, high-impedance CMOS logic
inputs
undetermined voltages. Therefore, the SS809G/810G
are perfect for most CMOS applications down to VCC
RESET is guaranteed to be a logic low for
TH
>V
CC
In addition to issuing a reset to the µ P during
>0.9V. Once V
connected
to
CC
CC
RESET
returns above the reset
exceeds the reset
CC
drops below the
www.SiliconStandard.com
can
drift
CC
to
threshold, and RESET remains low for the reset
timeout period.
BENEFITS
THRESHOLD
The SS809G and SS810G with specified voltage as 5V ±
10% or 3V ±10% are ideal for systems using a 5V ±5%
or 3V ±5% power supply. The reset is guaranteed to
assert after the power supply falls out of regulation,
but before the power drops below the minimum
specified operating voltage range of the system ICs.
The pre-trimmed thresholds reduc e the range over
which an undesirable reset may occur.
must be valid down to 0V, adding a pull-down resistor
to RESET causes any leakage currents to flow to
ground, holding RESET low.
INTERFACING TO A MICROPROCESSOR WITH
BIDIRECTIONAL RESET PINS
The RESET output on the SS809N is open drain,
and this device interfaces easily with µPs that have
bidirectional
supervisor’s
microcontroller’s RESET pin with a single pull-up
resistor allows either device to assert reset.
of 0.9V. However in applications where RESET
OF
reset
RESET
HIGHLY
pins.
output
SS809/810G
ACCURATE
Connecting
directly
the
to
7 of 8
RESET
the
P

Related parts for SS809