SS8014-18GTR SSC [Silicon Standard Corp.], SS8014-18GTR Datasheet - Page 7

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SS8014-18GTR

Manufacturer Part Number
SS8014-18GTR
Description
300mA Low-Noise LDO Regulators
Manufacturer
SSC [Silicon Standard Corp.]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SS8014-18GTR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
1/12/2005 Rev.2.10
Pin Description
Detailed Description
The block diagram of the SS8014-xx is shown in Figure 1.
It consists of an error amplifier, 1.25V bandgap reference,
PMOS output transistor, internal feedback voltage divider,
shutdown logic, over current protection circuit, and over
temperature protection circuit.
The internal feedback voltage divider’s central tap is
connected to the non-inverting input of the error amplifier.
The error amplifier compares non-inverting input with the
1.25V bandgap reference. If the feedback voltage is
higher than 1.25V, the error amplifier’s output becomes
higher so that the PMOS output transistor has a smaller
gate-to-source voltage (V
carrying capability of the PMOS output transistor, as a
result the output voltage decreases until the feedback
voltage is equal to 1.25V. Similarly, when the feedback
PIN
1
2
3
4
5
SHDN
SHDN
GND
GND
IN
IN
NAME
SHDN
GND
OUT
BYP
IN
SHUTDOWN
SHUTDOWN
OVER TEMP.
OVER TEMP.
PROTECT
PROTECT
LOGIC
LOGIC
GS
Regulator Input. Supply voltage can range from +2.5V to +5.5V. Bypass with 1µF to GND.
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane
to maximize thermal dissipation.
Active-High Enable Input. A logic low reduces the supply current to less than 1µA. Connect to IN for
normal operation.
This is a reference bypass pin. It should connect external 10nF capacitor to GND to reduce output
noise. Bypass capacitor must be no less than 1nF. (C
Regulator Output. Sources up to 150mA. Bypass with a 1µF, < 0.2
). This reduces the current
www.SiliconStandard.com
1.25V
1.25V
Vref
Vref
Figure 1. Functional Diagram
¡ Ð
¡ Ð
¡ Ï
¡ Ï
ERROR
ERROR
AMP
AMP
voltage is less than 1.25V, the error amplifier causes the
output PMOS to conduct more current to pull the feed-
back voltage up to 1.25V. Thus, through this feedback
action, the error amplifier, output PMOS, and the volt-
age-divider effectively form a unity-gain amplifier with the
feedback voltage forced to be the same as the 1.25V
bandgap reference. The output voltage, V
given by the following equation:
Alternatively, the relationship between R1 and R2 is given
by:
PROTECT & DYNAMIC
PROTECT & DYNAMIC
OVER CURRENT
OVER CURRENT
FUNCTION
FEEDBACK
FEEDBACK
V
R1 = R2 (V
BYP
OUT
= 1.25 (1 + R1/R2).
1nF)
OUT
typical ESR capacitor to GND.
/ 1.25 + 1).
R1
R1
R2
R2
OUT
OUT
BYP
BYP
SS8014-xxG
C
C
OUT
BYP
BYP
, is then
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(1)
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