SS8017TR SSC [Silicon Standard Corp.], SS8017TR Datasheet - Page 14

• Manufacturer Part Number: SS8017TR
• Description: Two Remote Temperature Sensors with SMBus Serial Interface and System Reset
• Manufacturer: SSC [Silicon Standard Corp.]

Rev.2.01 6/06/2003
Table 9. RLTS and RRTE Temp Register Update Timing Chart
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Software Standby RUN/STOP bit
Software Standby 1-shot command
To check for internal bus collisions, read the status
byte. If the least significant seven bits are ones, dis-
card the data and read the status byte again. The
status bits LHIGH, LLOW, RHIGH, and RLOW are r e-
freshed on the SMBus clock edge immediately follow-
ing the stop condition, so there is no danger of losing
temperature-related status data as a result of an inter-
nal bus collision. The OPEN status bit (diode continu-
ity fault) is only refreshed at the beginning of a conver-
sion, so OPEN data is lost. The ALERT interrupt latch
is independent of the status byte register, so no false
alerts are generated by an internal bus collision.
When auto-converting, if the THIGH and TLOW limits
are close together, it's possible for both high-temp and
low-temp status bits to be set, depending on the
amount of time between status read operations (espe-
cially when converting at the fastest rate). In these cir-
cumstances, it's best not to rely on the status bits to
indicate reversals in long-term temperature changes
and instead use a current temperature reading to e s-
tablish the trend direction.
Temperature Conversion Rate Byte
The conversion rate register (Table 7) programs the
time interval between conversions in free running
auto-convert mode. This v ariable rate control reduces
the supply current in portable-equipment applications.
The conversion rate byte's POR state is 02h (0.25Hz).
OPERATING
MODE
Power-on reset
1-shot command, while idling be-
tween automatic conversions
1-shot command that occurs dur-
ing a conversion
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
INITIATED BY:
CONVERSION
www.SiliconStandard.com
(CHANGED VIA WRITE TO CRW)
NEW CONVERSION RATE
N/A (0.25Hz)
The SS8017 looks only at the 3 LSB bits of this regis-
ter, so the upper 5 bits are "don't care" bits, which
should be set to zero. The conversion rate tolerance is
±25% at any rate setting.
Valid A/D conversion results for all channels are avail-
able one total conversion time (125ms nominal, 156ms
maximum) after initiating a conversion, whether con-
version is initiated via the RUN/STOP bit, one-shot
command, or initial power-up. Changing the conversion
rate can also affect the delay until new results are
available. See Table 8.
Slave Addresses
The SS8017 appears to the SMBus as one device hav-
ing a common address for all the ADC and fan control
channels. The device address is fixed to be 7Ah for
write and 7Bh for read.
The SS8017 also responds to the SMBus Alert R e-
sponse slave address (see the Alert Response A d-
dress section).
POR and UVLO
The SS8017 has a volatile memory. To p revent am-
biguous power-supply conditions from corrupting the
data in memory and causing erratic behavior, a POR
voltage detector monitors Vcc and clears the memory
if Vcc falls below 1.7V (typical, see Electrical Charac-
teristics table). When power is first applied and Vcc
rises above 1.75V (typical), the logic blocks begin
operating, although reads and writes at V
0.0625Hz
0.125Hz
0.25Hz
0.5Hz
N/A
N/A
1Hz
2Hz
4Hz
8Hz
N/A
N/A
When current conversion is
complete (1-shot is ignored)
TIME UNTIL RLTS AND
RRTE ARE UPDATED
156ms max
156ms max
312.5ms
237.5ms
1.25sec
2.5sec
625ms
156ms
156ms
20sec
10sec
5sec
SS8017
CC
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