MC74HC240ADWG ON Semiconductor, MC74HC240ADWG Datasheet - Page 5

IC INVERTER DUAL 4-INPUT 20SOIC

MC74HC240ADWG

Manufacturer Part Number
MC74HC240ADWG
Description
IC INVERTER DUAL 4-INPUT 20SOIC
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of MC74HC240ADWG

Logic Type
Inverter
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Logic Family
HC
Number Of Channels Per Chip
8
Polarity
Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 55 C
Number Of Lines (input / Output)
8 / 3
Output Type
3-State
Propagation Delay Time
80 ns at 2 V, 40 ns at 3 V, 16 ns at 4.5 V, 14 ns at 6 V
Logical Function
Buffer/Line Driver
Number Of Elements
2
Number Of Channels
8
Number Of Outputs
8
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC W
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Quiescent Current
4uA
Technology
CMOS
Pin Count
20
Mounting
Surface Mount
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74HC240ADWG
MC74HC240ADWGOS
INPUTS
A1, A2, A3, A4, B1, B2, B3, B4
(Pins 2, 4, 6, 8, 11, 13, 15, 17)
on the corresponding Y outputs, when the outputs are
enabled.
CONTROLS
Enable A, Enable B (Pins 1, 19)
to these pins, the outputs are enabled and the devices
Data input pins. Data on these pins appear in inverted form
Output enables (active−low). When a low level is applied
DATA INPUT
YA OR YB
OUTPUT
A OR B
*Includes all probe and jig capacitance
t
PHL
t
THL
DEVICE
UNDER
TEST
Figure 3. Test Circuit
10%
50%
90%
Figure 1.
90%
50%
t
r
10%
OUTPUT
TEST POINT
C
L
*
t
f
SWITCHING WAVEFORMS
t
PLH
t
TLH
PIN DESCRIPTIONS
http://onsemi.com
V
GND
MC74HC240A
CC
5
OUTPUT Y
OUTPUT Y
ENABLE
function as inverters. When a high level is applied, the
outputs assume the high−impedance state.
OUTPUTS
YA1, YA2, YA3, YA4, YB1, YB2, YB3, YB4
(Pins 18, 16, 14, 12, 9, 7, 5, 3)
output−enable pins, these outputs are either inverting
outputs or high−impedance outputs.
DEVICE
UNDER
Device outputs. Depending upon the state of the
TEST
*Includes all probe and jig capacitance
50%
OUTPUT
50%
50%
Figure 4. Test Circuit
TEST POINT
t
t
PZL
PZH
Figure 2.
C
1 kW
t
t
L
PHZ
PLZ
*
CONNECT TO V
TESTING t
CONNECT TO GND WHEN
TESTING t
10%
90%
PLZ
PHZ
V
GND
HIGH
IMPEDANCE
V
V
HIGH
IMPEDANCE
AND t
CC
OL
OH
AND t
CC
WHEN
PZL
PZH
.
.

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