in74act112 Integral Corp., in74act112 Datasheet

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... Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. ...

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... IN OUT CC Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V Unused outputs must be left open. Parameter and GND Pins CC SOIC Package+ Parameter * IN74ACT112 Value Unit -0.5 to +7 ±20 mA ±50 mA ±50 mA ...

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... I OUT 5 = = GND 5 2 =1.65 V Max 5.5 OLD V =3.85 V Min 5.5 OHD GND 5 IN74ACT112 Guaranteed Limits 25 °C -40°C to Unit 85°C 2.0 2.0 V 2.0 2.0 0.8 0.8 V 0.8 0.8 4.4 4.4 V 5.4 5.4 3.86 3.76 4.86 4.76 0.1 0.1 V 0.1 0.1 0.36 0.44 0.36 0.44 ±0.1 ±1.0 μA 1 -75 mA 4.0 40 μA ...

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... Minimum Recovery Time, Set or Reset to Clock rec (Figure 2) =5.0 V ± 10 Min 145 1.0 1.0 1.0 1.0 Typical @25°C,V =5 =5.0 V ± 10%, C =50pF, Input IN74ACT112 =50pF,Input t =t =3.0 ns Guaranteed Limits 25 °C -40°C to 85°C Unit Max Min Max 125 MHz 14.0 1.0 15 ...

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... Figure 1. Switching Waveform Figure 3. Switching Waveform EXPANDED LOGIC DIAGRAM IN74ACT112 Figure 2. Switching Waveform 5 ...