cxa3197r Sony Electronics, cxa3197r Datasheet - Page 6

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cxa3197r

Manufacturer Part Number
cxa3197r
Description
10-bit 125msps D/a Converter
Manufacturer
Sony Electronics
Datasheet

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Pin No.
26
27
28
20
21
22
23
24
25
C1
C2
C3
CLKP/E
CLKN/E
RESET/T
RESETP/E
RESETN/E
DGND2
Symbol
I/O
I
I
I
I
I
I
I
I
Typical voltage level
Single power
supply: GND
Dual power
supply: –5V
PECL
PECL
PECL
PECL
TTL
TTL
TTL
TTL
DGND1
DGND1
DV
DV
DGND1
DGND1
DV
DV
CC
CC
22
26
27
28
CC
20
1
CC
1
21
23
24
– 6 –
1
1
Equivalent circuit
1.5V
1.5V
Function setting.
Function setting.
Function setting.
Clock input.
Use this pin when the
clock is input at PECL
level.
At this time, leave
Pin 19 open.
CLKP/E and CLKN/E
are complementary and
should be used together.
CLKP/E complementary
input.
Reset signal input.
When multiple
CXA3197R are
operated at the same
time in MUX.1A or
MUX.1B mode, the start
timing of the internal 1/2
frequency divider
circuits should be
matched.
At this time, the reset
signal is used; when the
reset signal is at TTL
level, Pin 22 is used and
Pins 23 and 24 are left
open. When the reset
signal is at PECL level,
Pins 23 and 24 are used
and Pin 22 is left open.
The reset signal polarity
can be set by Pin 39
(R POLARITY).
Leave the reset pin
open when other modes
are used.
RESETP/E and
RESETN/E are
complementary and
should be used together.
Digital power supply.
Description
CXA3197R

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