TC1270A MICROCHIP [Microchip Technology], TC1270A Datasheet - Page 19

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TC1270A

Manufacturer Part Number
TC1270A
Description
Voltage Supervisor with Manual Reset Input
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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Table 4-2
and their V
negative percentage change from common regulated
voltages is shown.
In the case where V
age, as the V
RST/RST pin is driven active. Now the desired circuitry
is in reset, or the circuitry has the indication that the
V
In the case where V
V
the Reset Delay Timer elapses. Now the desired cir-
cuitry is released from reset and will start to operate in
its normal mode, or the circuitry has the indication that
the V
TABLE 4-2:
The
optimized to reject fast transient glitches on the V
line. If the low input signal (which is below V
rejected, the Reset output is driven active within 50 µs
of V
After the device exits the Reset condition, the delay
circuitry will hold the RST/RST pin active until the
appropriate Reset delay time (t
During device power up, the input voltage is below the
Trip Point voltage. The device must enter the valid
operating range for the device to start operation.
© 2007 Microchip Technology Inc.
Note 1:
Selection
DD
TRIP
Voltage
DD
Trip
is below the selected V
DD
M
T
S
R
L
voltage, the RST/RST pin is driven inactive after
TC1270A/TC1270AN/TC1271A
2:
falling through the Reset voltage threshold.
is above the selected V
shows the various device trip point options
TRIP(MAX)
Voltage regulator circuit must have tighter
tolerance (%) than V
regulated voltage.
Circuitry being reset must have a wider
tolerance (%) than V
regulated voltage.
V
V
TRIP(MAX)
TRIP(MIN)
DD
4.75V
4.50V
4.50V
4.25V
3.15V
3.00V
3.00V
2.85V
2.70V
2.55V
SELECTING THE TRIP POINT
DD
DD
/
crosses the V
and V
is falling from the regulated volt-
is rising. As the V
(2)
(1)
TRIP(MIN)
TRIP
10.0%
10.0%
15.0%
5.0%
5.0V
RST
Regulated Voltage
.
TRIP
TRIP(MAX)
TRIP(MIN)
) has elapsed.
.
- % From
voltages. Also the
TRIP
13.7%
4.5%
9.2%
9.2%
3.3V
DD
devices
% from
% from
voltage the
crosses the
TRIP
10.0%
15.0%
3.0V
) is not
are
DD
4.2.1
There is also a minimal hysteresis (V
point. This is so that small noise signals on the device
voltage (V
“jitter” (change between driving an active and inactive).
The characterization graphs shown in Figures
through
age of the voltage trip point (V
The Reset Delay Timer (t
teresis for the system.
4.2.2
As the device V
remain active until the voltage rises above the “actual”
trip point (V
Figure 4-7
form of the RST and RST pins. As the device powers
up, the voltage will start below the valid operating volt-
age of the device. At this voltage, the RST/RST output
is not valid. Once the voltage is above the minimum
operating voltage (1V) and below the selected V
the Reset output will be active.
Once the device voltage rises above the V
the Reset delay timer (t
delay timer times out, the Reset output (RST/RST) is
driven inactive.
FIGURE 4-7:
Power-up.
TC1270A/70AN/71A
Note 1: Additional system current is consumed
V
RST
RST
DD
2-15
2: The TC1270AN requires an external
DD
shows a power-up sequence and the wave-
TRIP
(2)
HYSTERESIS
POWER-UP/RISING V
) do not cause the Reset pin (RST/RST) to
during the t
pull-up resistor.
shows the device hysteresis as a percent-
).
DD
1V
rises, the device’s Reset circuit will
RST/RST pin Operation
RST
V
RST
RST
TRIP
) starts. When the Reset
time.
) gives a time based hys-
TRIP
).
DS22035B-page 19
DD
HYS
t
RST
TRIP
) on the trip
(1)
voltage,
2-13
TRIP
,

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