SC2434EVB SEMTECH [Semtech Corporation], SC2434EVB Datasheet - Page 8

• Manufacturer Part Number: SC2434EVB
• Description: TriPhase Current Mode Controller with Power Good
• Manufacturer: SEMTECH [Semtech Corporation]

Program The Controller
Please refer to Fig. 1 and the application schematics in
this data sheet for the discussion. The resistor from pin
10 to ground, R
resistor from pin 11 to ground, R
step size. The resistors, R
step size, the output voltage set point, and the droop,
respectively.
MathCAD programs are available to calculate the required
parameters upon request.
Programming The Switching Frequency
The oscillator frequency can be selected first by setting the
value of R
The per phase switching frequency is 1/3 of the oscilla-
tor frequency in three-phase mode. It is recommended
that per phase switching frequency is 200~300KHz for
good trade off of efficiency vs. transient responses.
Programming The DAC Step Size
The SC2434 allows programming of the output voltage
and the DAC step size by selecting external resistors. The
LSB of the DAC current is given by:
where V
and R
given VID step size (25mV for VRM9.0 and VRM9.2 speci-
fications), the feedback resistor can be calculated accord-
ing to the LSB of DAC current:
The above two equations are for choosing R
simultaneously. The advantage of this method is that new
VID step size can be accommodated by modifying external
components while maintaining the required precision.
Choose Current Sensing Resistor According To The
Threshold Of OCP
The SC2434 controller has an over current protection (OCP)
threshold of 120mV. The normal practice is to let the
peak voltage across the sensing resistor corresponding to
POWER MANAGEMENT
Applications Information (Cont.)
2005 Semtech Corp.
DAC
bg
is the resistor from pin 11 to ground. For the
OSC
is the trimmed voltage reference (V
as given below:
OSC
, programs the switching frequency. The
R OSC
R FB
I DAC_LSB
28.5 KΩ
I DAC_LSB
FB
VID step
, R
.
16
1
OS
.
.
750 KHz
R DAC
DAC
V bg
F osc
, and R
.
, sets the DAC current
DRP
set the DAC
DAC
bg
and R
= 1.5V)
FB
8
full-load operation be 75% of the given OCP threshold:
where I
the choice of sensing resistor values are limited, typically 3
mOhm, 4 mOhm, or 5 mOhm, it is recommended to choose
the sensing resistor with a bigger value than that was cal-
culated, and to use a resistive divider to get the equiva-
lent R
have value of 20 Ohm in parallel. A filter capacitor of
10nF is also needed to be across the OC+ and OC- pins of
the controller IC. Please refer the application circuit sche-
matic.
Programming The Dynamic (Active) Droop
To optimize transient responses, the SC2434 actively regu-
lates output voltage as a function of output current. At
zero current the output is positioned to the upper limit of
the regulation window. As the load increases, the output
“droops” towards the lower limit. This makes optimum
use of the output voltage error band, yielding minimum
output capacitor size and cost.
The droop is adjusted by setting the DC gain of the error
amplifier. This is done by choosing the resistor from the
ERROUT pin to the FB pin (R
the optimum value of R
the following equation can provide the first order calcula-
tion for given droop slope:
where R
into account of attenuation, and G
current amplifier while N
used.
Any output interconnection impedance not within the feed-
back loop can contribute to additional drooping. This ef-
fect has to be taken into account. Usually, when testing
the regulation at different CPU pins, the results may vary
slightly by same token.
It is important to use surface mount current sensing resis-
tor to minimize the parasitic inductance for accurate cor-
relation between the above equation and the test results.
This is because the inductive contribution, which may also
sense
peak
sense
is the peak current of the output inductor. Since
value.
R drp
is the current sensing resistance after taken
R sense
The two attenuation resistors should
R FB R sense
DRP
.
∆V out
phase
may be derived experimentally,
75% "120mV
DRP
I peak
is number of phases being
) of the controller. While
.
G ca
ca
.
PRELIMINARY
N phase
is the gain of the
∆I out
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